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24
C000, 32K Shadow; The settings are:
C800, 16K Shadow; Disabled:
The specified ROM is not copied to
CC00, 16K Shadow;
RAM.
D000, 16K Shadow; Enabled:
The contents of the ROM area are
D400, 16K Shadow;
not only copied from ROM to RAM
D800, 16K Shadow;
for faster execution, the contents of
DC00, 16K Shadow
the RAM area can be written to or
read from cache memory.
Cached:
The contents of the ROM area are
copied from ROM to RAM for
faster execution.
Advanced Chipset Setup
Choose the item from the BIOS Setup main menu.
All Chipset Setup options are described in this section.
DIMM# 1, 2, 3
Set these options to select the speed of used
Timing
memory bank(DIMM# 1, 2, 3).
SDRAM CAS#
Set this option to select the proper SDRAM
Latency
CAS# Latency.
DRAM Page Mode Set this option to Enabled the Multi-Page mode
for used DRAM.
DRAM Integrity
Choose Non-ECC, EC-Only, or ECC.
Mode
Non-ECC:
Has byte-wise write capability but
no provision for protecting data
integrity in the DRAM array.
EC-Only:
Data errors are detected but not
corrected.
ECC:
Allows a detecton between single-
bit and multiple-bit errors and
recovery of single-bit errors.
Chapter 3
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