Tektronix 80A05 User Manual page 22

Specifications
12
Table 4: (Cont.)Module characteristics
Specifications Characteristics
50 Ω
Input/output
impedance
±2% or less over zone 10 ns to 20 ps before step transition
Step response aberra-
±10% or less for the first 300 ps following step transition
tions
+1% - - 5% or less over zone 300 ps to 3 ns following step transition
+1% - - 3% or less over zone 3 ns to 100 ns following step transition
±0.5% after 100 ns following step transition
±3 dB, DC to 20 GHz
Analog bandwidth
Front panel output Trigger clock output:
amplitudes 10G clock output:
Front panel rise and Trigger clock output:
fall times 10G clock output:
Recovered clock tim- Recovered clock tim- 50 M/bs to 2.7 G/bs: 50 M/bs to 2.7 G/bs:
ing jitter ing jitter 2.7 G/bs to 6.375 G/bs: 2.7 G/bs to 6.375 G/bs:
9.8 G/bs to 12.6 G/bs:
Minimum clock recov- Single-ended operation:
ery sensitivity 150Mb/s to 2.7 G/bs:
2.7 G/bs to 11.19 G/bs:
11.19 G/bs to 12.5 G/bs
Complementary operation:
150Mb/s to 2.7 G/bs:
2.7 G/bs to 11.19 G/bs:
11.19 G/bs to 12.5 G/bs
Supported data rates OC3/SMT1
and formats OC12/STM4
(without Option 10G) FibreChannel
Gigabit Ethernet
2 Gigabit FibreCHannel
OC48/STM16
2 Gigabit Ethernet
InfiniBand
2.5G G.709 FEC
4 Gigabit FibreChannel
Supported user se-
lected clock recovery
(without Option 10G)
Supported data rates OC192/STM64
and formats added 10GBase-W
with Option 10G 10GBase-R
10G FibreChannel
G.975 FEC
G.709 FEC
10GbE w/FEC
400 mV
500 mV
300 ps
30 ps
< 1.0% of unit interval < 1.0% of unit interval
< 2.5 ps RMS < 2.5 ps RMS
< 2.0 ps RMS
10 mV
15 mV
20 mV
8 mV
12 mV
15 mV
155.52 Mb/s
622.08 Mb/s
1.063 Gb/s
1.250 Gb/s
2.125 Gb/s
2.488 Gb/s
2.500 Gb/s
2.500 Gb/s
2.666 Gb/s
4.250 Gb/s
50 Mb/s to 2.7 Gb/s
3.000 Gb/s to 3.188 Gb/s
9.953 Gb/s
9.953 Gb/s
10.31 Gb/s
10.51 Gb/s
10.66 Gb/s
10.71 Gb/s
11.10 Gb/s
80A05 Electrical Clock Recovery Module User Manual
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