IAR SYSTEMS I-jet User Manual page 21

This is the pinout of the target TI-14 JTAG header. Pin 6 should be missing to indicate
the proper orientation.
TMS
1
2
TDI
3
4
PD
5
6
TDO
7
8
TCK_RET
9 10
TCK 11
12
EMU0
13
14
Figure 8: Pinout of the target TI-14 JTAG header
These are the pin defintitions for the TI14 header:
I-jet
Pin Name
direction
nTRST Output Test Logic
Reset
TCK Output Test Clock
TMS Output Test Mode
Select
TDI Output Test Data
Input
TDO Input Test Data
Output
RTCK Input TCK Return
PD Input Power Detect Should be tied to the I/O voltage of the target device. Used
EMU0 I/O Emulation 0
Table 7: TI14 pin definitions
nTRST
GND
KEY
GND
GND
GND
EMU1
Description
Active LOW signal that causes all test and debug logic in the
device to be reset along with the IEEE 1149.1 TAP.
This is the test clock used for driving the IEEE 1149.1 TAP
state machine and logic.
Directs the next state of the IEEE 1149.1 TAP state machine.
IEEE 1149.1 scan data input to the device.
IEEE 1149.1 scan data output from the device.
Used only in Adaptive Clocking mode. I-jet monitors RTCK
to determine when to send the next TCK.
by I-jet to detect if target power is active and to set the
JTAG signal voltage reference for level translators.
Depending on the device, EMU pins support boot modes
and other features. I-jet does not use this pin but it is routed
to the TRACEDATA[2] pin on the MIPI20 connector. For
proper booting, this pin should be pulled-up on the target.
Technical specifications
21