PCI-DIO96H User's Guide
PCI-DIO96H block diagram
PCI-DIO96H functions are illustrated in the block diagram shown here.
FOURTHPORTA(7:0)
FOURTHPORTB(7:0)
FOURTHPORTCH(3:0)
FOURTHPORTCL(3:0)
THIRDPORTA(7:0)
THIRDPORTB(7:0)
THIRDPORTCH(3:0)
THIRDPORTCL(3:0)
SECONDPORTA(7:0)
SECONDPORTB(7:0)
SECONDPORTCH(3:0)
SECONDPORTCL(3:0)
FIRSTPORTA(7:0)
FIRSTPORTB(7:0)
FIRSTPORTCH(3:0)
FIRSTPORTCL(3:0)
HIGH DRIVE
FOURTHPORT
FOURTHPORTA
FOURTHPORTB
FOURTHPORTCH
FOURTHPORTCH
FOURTHPORTCL
HIGH DRIVE
THIRDPORT
THIRDPORTA
THIRDPORTB
THIRDPORT H
C
THIRDPORTCL
HIGH DRIVE
SECONDPORT
SECONDPORTA
SECONDPORTB
SECONDPORTCH
SECONDPORTCL
HIGH DRIVE
FIRSTPORT
FIRSTPORTA
FIRSTPORTB
FIRSTPORTCH
FIRSTPORTCL
Controller FPGA and Logic
Control
Control
Bus
Registers
Decode/Status
Bus
Timing
LOCAL BUS
Boot
EEPROM
PCI
Controller
PCI BUS (5V, 32-BIT, 33MHZ)
8
Introducing the PCI-DIO96H
PCI-DIO96H
Block Diagram
BADR2
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