Analog Devices ADSP-21262 EZ-KIT Lite Manual page 9

PREFACE
Thank you for purchasing the ADSP-21262 EZ-KIT Lite
Devices, Inc. evaluation system for SHARC
The SHARC processors are based on a 32-bit super Harvard architecture
that includes a unique memory architecture comprised of two large
on-chip, dual-ported SRAM blocks coupled with a sophisticated IO pro-
cessor, which gives a SHARC processor the bandwidth for sustained
high-speed computations. SHARC processors represent today's de facto
standard for floating-point processor targeted for premium audio
applications.
The evaluation system is designed to be used in conjunction with the
®
CrossCore Embedded Studio (CCES) and VisualDSP++
environments to demonstrate capabilities of the ADSP-21262 SHARC
processors. The development environment aids advanced application code
development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21262 assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the ADSP-21262 processor from a personal computer (PC) is
achieved through a USB port or an optional JTAG emulator. The USB
ADSP-21262 EZ-KIT Lite Evaluation System Manual
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, Analog
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processors (DSPs).
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development
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