Wakeup Timer Start Timing; Table 48 Te Bit; Table 49 Tf Bit; Table 50 Tie Bit - Epson RX8804CE Applications Manual

RX8804CE
4) TE (Timer Enable) bit
This bit controls the start/stop setting for the wakeup timer interrupt function.

Table 48 TE bit

TE Data
0
Write / Read
1
5) TF (Timer Flag) bit
If set to 0 beforehand, this flag bit's value changes from "0" to "1" when a wakeup timer interrupt event has
occurred. Once this flag bit's value is "1", its value is retained until a "0" is written to it.

Table 49 TF bit

TF Data
0
Write
1
0
Read
1
6) TIE (Timer Interrupt Enable) bit
When a wakeup timer interrupt event occurs (when the TF bit value changes from "0" to "1"), this bit's value
specifies whether an interrupt signal is generated (/INT status changes from Hi-Z to low) or is not generated
(/INT status remains Hi-Z).

Table 50 TIE bit

TIE Data
0
Write / Read
1

8.6.3. Wakeup Timer Start Timing

Counting down of the wakeup timer value starts at the rising edge of the SCL signal that occurs when the TE
value is changed from 0 to "1" (after bit "0" is transferred).
Figure 16 Wakeup Timer Start Sequence
Preset value loaded to all Timer counter, and count-down stops
Starts wakeup timer countdown

The countdown that starts when the TE bit value changes from 0 to 1 always begins from the preset
value
The TF bit is cleared to zero to prepare for the next status detection
 Clearing this bit to zero does not enable the /INT low output status to be cleared (to Hi-Z).
Invalid (writing a 1 will be ignored)!
Wakeup timer interrupt events are not detected.
Wakeup timer interrupt events are detected.
(Result is retained until this bit is cleared to zero.)
1) When a wakeup timer interrupt event occurs, an interrupt signal is not
generated or is canceled (/INT status remains Hi-Z)
2) When a wakeup timer interrupt event occurs, the interrupt signal is canceled
(/INT status changes from low to Hi-Z)

Even when the TIE bit value is "0" another interrupt event may change the /INT status to low (or may
hold /INT = L)
When a wakeup timer interrupt event occurs, an interrupt signal is generated (/INT
status changes from Hi-Z to low)

When a wakeup timer interrupt event has been generated low-level output from the /INT pin occurs
only when the value of the control register's TIE bit is 1. Earliest 7.813 ms the interrupt occurs, the
/INT status is automatically cleared (/INT status changes from low to Hi-Z).
Description
Description
Description
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