Table 45 Tesl Bit; Table 46 Tstp Bit; Table 47 Tres Bit - Epson RX8804CE Applications Manual

Real time clock module
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RX8804CE
1) TSEL0, 1bits (Timer Select 0, 1)
The combination of these two bits is used to set the countdown period source clock for the wakeup timer interrupt
function (four settings can be made).

Table 45 TESL bit

TSEL1
TSEL0,1
(bit 1)
0
0
Write / Read
1
1
1.
tRTN is different with a source clock in automatic release time. TF is not cleared automatically.
2.
Source clock of 1 Hz does not synchronize to update of a second. (It is a 1 Hz clock for timers)
3.
Source clock 1/60 Hz synchronize in update of a minute.
4.
A preset value, it is loaded with the first source clock of a timer counter after having set TE.
5.
Therefore, two periods of source clocks are needed at the maximum till the first countdown starts after
TE="1".
Delay of the first countdown. Preset value is 3
TE
Source Clock
Delay
Down Counter
Undefined
Preset Value
Load Preset Value
TF
When timer count value is 0 from 1, preset value is loaded at the time by a timer
Therefore, can't monitor 0 of timer counter
Figure 15 Wakeup Timer Count Down Timing Chart
2) TSTP (Timer STOP) bit
This bit controls the temporarily stopped of Timer Counter.

Table 46 TSTP bit

TSTP
Data
0
Write / Read
1
3)
TRES (Timer Reset) bit
This bit can be employed like Watch Dog Timer function.

Table 47 TRES bit

TRES
Data
0
Write / Read
1
TSEL0
(bit 0)
0
1
*Default Second" update / Once per second
0
1
Period of Clock
3
Timer Counter are stopped. (don't reset)
Count down of the Timer Counter are continued
The Timer Counter is not affected
Preset value is loaded to all Timer Counters
Source clock / cycle time
4096 Hz / Once per 244.14 µs
64 Hz / Once per 15.625 ms
"Minute" update / Once per minute
2
3
Description
Description
Page - 25
Auto reset time
tRTN Min.
122 µs
7.813 ms
7.813 ms
7.813 ms
1
3
TF is Set
ETM59E-05

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