ETM38E-03 Application Manua Real Time Clock Module RA4803SA Preliminary...
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RA4803SA For automotive Serial Interface Real-time Clock Module RA4803 • Features built-in 32.768 kHz DTCXO, High Stability. • Serial interface in 4 lines form • Alarm interrupt function for day, date, hour, and minute settings • Fixed-cycle timer interrupt function •...
RA4803SA 4. Absolute Maximum Ratings GND = 0 V Item Symbol Condition Rating Unit −0.3 to +6.5 Supply voltage Between V and GND −0.3 to +6.5 Input voltage CE, CLK, DI, FOE, EVIN pin Output voltage (1) DO, FOUT pin GND−0.3 to V...
RA4803SA 7. Electrical Characteristics 7.1. DC characteristics = 1.6 V to 5.5 V , Ta = −40 °C to +85 °C *Unless otherwise specified, GND = 0 V , V Item Symbol Condition Min. Typ. Max. Unit Current CE = GND, /INT = V =5 V 0.75...
RA4803SA 8. Use Methods 8.1. Description of Registers 8.1.1. Write / Read and Bank Select R/W and Register bank are specified by the four bits mode setting code. Bank1: Basic time and calendar register. … Adds 1/100s Counter. Bank2: Extension register...
RA4803SA 8.2.3. Alarm registers Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 MIN Alarm • HOUR Alarm WEEK Alarm • DAY Alarm • The alarm interrupt function is used, along with the AEI, AF, and WADA bits, to set alarms for specified date, day, hour, and minute values.
RA4803SA 5) FSEL0,1 ( FOUT frequency Select 0, 1 ) bits The combination of these two bits is used to set the FOUT frequency. FSEL1 FSEL0 FSEL0,1 FOUT frequency (bit 3) (bit 2) ∗ Default 32768 Hz Output 1024 Hz Output...
RA4803SA Data Description The VLF bit is cleared to zero to prepare for the next status detection. Write This bit is invalid after a "1" has been written to it. Data loss is not detected. Read Data loss is detected. All registers must be initialized.
RA4803SA Data Function When a time update interrupt event occurs, an interrupt signal is not generated or is canceled (/INT status changes from low to Hi-Z). When a time update interrupt event occurs, an interrupt signal is generated Write/Read (/INT status changes from Hi-Z to low).
RA4803SA 8.2.8. OSC Offset Contorol ( Reg -C / Bank 3 ) Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 OSC Offset OFS3 OFS2 OFS1 OFS0 1) OFS bits (OFS3-OFS0) The offset adjustment is done to the oscillation frequency.
RA4803SA 8.3. Fixed-cycle Timer Interrupt Function The fixed-cycle timer interrupt generation function generates an interrupt event periodically at any fixed cycle set between 244.14 µs and 4095 minutes. When an interrupt event is generated, the /INT pin goes to low level and "1" is set to the TF bit to report that an event has occurred.
RA4803SA 5) TIE (Timer Interrupt Enable) bit When a fixed-cycle timer interrupt event occurs (when the TF bit value changes from "0" to "1"), this bit's value specifies whether an interrupt signal is generated (/INT status changes from Hi-Z to low) or is not generated (/INT status remains Hi-Z).
RA4803SA 8.4. Time Update Interrupt Function The time update interrupt function generates interrupt events at one-second or one-minute intervals, according to the timing of the internal clock. When an interrupt event occurs, the UF bit value becomes "1" and the /INT pin goes to low level to indicate that an event has occurred.
RA4803SA 8.4.2. Related registers for time update interrupt functions. Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Extension Register USEL TEST WADA FSEL1 FSEL0 TSEL1 TSEL0 Flag Register ...
RA4803SA 8.5. Alarm Interrupt Function The alarm interrupt generation function generates interrupt events for alarm settings such as date, day, hour, and minute settings. When an interrupt event occurs, the AF bit value is set to "1" and the /INT pin goes to low level to indicate that an event has occurred.
RA4803SA 3) AF (Alarm Flag) bit When this flag bit value is already set to "0", occurrence of an alarm interrupt event changes it to "1". When this flag bit value is "1", its value is retained until a "0" is written to it.
RA4803SA 8.6. Read/Write of data For both read and write, first set up chip condition (internally CE="H") to CE="H" , then specify the 4-bits address, and finally read or write in 8-bits units. Both read and write use MSB-first. In continuous operation, objected address is auto incremented.
RA4803SA 8.9 Connection with Typical Microcontroller 4.7 µF Note Schottky Barrier Diode RA4803 0.1 µF / INT FOUT Note : When using the seconding battery, the diode is not required. When using the primary battery, the diode is required. For detailed value on the resistance, please consult a battery maker.
RA4803SA 8.11. Note about read-out method of a 1/100s register RA-4803 is equipped with a 1/100s register. As for 1/100 counters, it is worked in very fast clock than second. Therefore, as for the count operation of each, behavior in a chip access hold facility (P.8 reference) operation is different.
RA4803SA 10. Application notes 1) Notes on handling This module uses a C-MOS IC to realize low power consumption. Carefully note the following cautions when handling. (1) Static electricity While this module has built-in circuitry designed to protect it against electrostatic discharge, the chip could still be damaged by a large discharge of static electricity.
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