Epson RX8130CE Applications Manual
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Epson RX8130CE Applications Manual

Epson RX8130CE Applications Manual

Real time clock module
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ETM50E Revision History
Application manual
Real Time Clock Module
RX8130CE
ETM50E-07
Product name
Product number
RX8130CE
X1B000311000100

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  • Page 1 ETM50E Revision History Application manual Real Time Clock Module RX8130CE ETM50E-07 Product name Product number RX8130CE X1B000311000100...
  • Page 2 Epson’s official web sites and resources. This document may not be copied, reproduced, or used for any other purposes, in whole or in part, without Epson’s prior consent. Information provided in this document including, but not limited to application circuits, programs and usage, is for reference purpose only.

  • Page 3: Etm50E Revision History

    32 to 41 Fully revised (battery Backup switching) Reference characteristics of the charge current in VBAT. Added Figure 14-33. Typical MCU connection Added Figure 14-34 32kHz oscillator connection Added Tables Added Figures RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 4 Charge enabled timing was fine corrected in Timing Chart. Figure 37 Figure 38 Software-Reset-Flow was added. Software-Reset. INIEN bit processing was added to Flow-chart of initializing. Pin connection was added for use as 32.768 kHz-Oscillator. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 5: Table Of Contents

    14.3.1. Related registers for Alarm interrupt functions..............32 14.3.2. Examples of alarm settings .................... 33 14.4. Time Update Interrupt Function ....................35 14.4.1. Related registers for time update interrupt functions............35 RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 6 C-Bus protocol ..........................61 20 Circuit Diagram connection ..................63 20.1 Typical MCU connection ........................ 63 20.2 32.768 kHz oscillator application connection ................64 21. Tables ........................65 22. Figures ........................66 Contacts .......................... 68 RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 7: Overview

    By the backup battery charge control function and the interface power supply input pin, RX8130CE can support various power supply circuitries.

  • Page 8: Terminal Description

    Note: Open drain pins are able to Pull-up to 5.5V regardless of V applied voltage. Note: Use the FOUT, /RST, /IRQ terminals as Open when not in use. Don't connected to GND or V RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 9: Examples Of External Connection

    (3) Primary battery as backup (CHGEN=0) (4) Case of V supply only. 3.0 V 3.0 V 0.1F 0.1F 0.1F 1.0F 1.0F 1 k Max. 0.1F Primary battery Figure 5 Circuit EX3 Figure 6 Circuit EX4 RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 10: External Dimensions / Marking Layout

    R8130   A123B Production lot #1 Pin Mark Contents displayed indicate the general markings and display, but are not the standards for the fonts, sizes and positioning. Figure 8 Marking Layout RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 11: Absolute Maximum Ratings

    Oscillation start time Internal Crystal oscillation start =3.0V; 10 6  Ta=+25C,V 5 Aging /year first year 1 ) The monthly error is equal to 60 s Max. ( excluding offset ) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 12: Electrical Characteristics

    DET32 BFVSEL=01b (falling edge of Low V detection 2.32 2.40 2.48 end voltage DET4 Register flag VBLF = 1b =3.0 V、V =0.0 V off-leak current =3.0 V 、V =0.0 V off-leak current RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 13 FOUT = 1 mA GND+0.5 output voltage GND+0.2 /RST,/IRQ = 5 V, I = 1 mA = 3 V, I = 1 mA GND+0.4  2 V, I = 3 mA GND+0.4 RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 14 = 1.6 V  5.5 V , Ta= 40 C  +85 C ※Unless otherwise specified GND = 0 V , V Item Symbol Condition Min. Typ. Max. Unit FOUT symmetry 50% V Level RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 15 DET2 DELAY_B Init DELAY /RST t_int is an intermittence drive timing of a V detect circuit. Maximum value is 35 ms. DET2 Figure 11 Reset signal timing chart ( Backup resume ) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 16: Interface Timing When Power Is Turned On / Off

    See the tCL and tCU specifications in the chart below. 5: These specifications don't mean a noise characteristic of a power supply of RTC. Do not use amplitude signal output from a signal generator etc, as a power source. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 17: Vdd On / Off When Using Power Switching (Inien = 1)

    A set of VLF. and V in Figures 13 and 14 are the voltages of V and V pins of RX8130CE. Regarding access to the clock register after the initial power-on, , See "10.1 restrictions of I2C interface in the initial power on".

  • Page 18: Reference Information

    3.How to find the date difference Date Difference = f/f  86400 s  For example: f/f = 11.57410 is an error of approximately 1 second / day. Figure 15 Frequency temperature characteristics RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 19: Application Notes

    (6) Installation of charged battery. When a charged backup battery is installed by soldering, battery connection terminal of this device should connect to GND, beforehand. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 20: Overview Of Functions And Registers

    Output could also be 1 Hz, or 1024 Hz. 8) User RAM RAM register is read/write accessible for any data. 9) Digital offset function The clock precision can be increased by adding a time offset. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 21: Register Table

    Please make sure to only access above mentioned user registers. “-“ bit is TEST bit. As initialization “0” should be set and be kept “0”. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 22: Register Initial Value And Read/Write Operation Table

    3 bit 2 bit 1 bit 0 Addressh 20-23 Addressh Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Digital offset Extension Register1 RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 23: Description Of Registers

    4) WADA, AF, AIE bit These bits are used to control operation of the alarm interrupt function. 5) TEST bit These bits are the manufacturer's test bit. Always leave this bit value as "0".. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 24: Function-Related Register 2 (1Fh)

    13.3.7. Digital offset register (30 1) DTE bit Setting of a Digital offset function (ON/OFF). [17. Digital offset function ] for the details. 2) L7  L1 bit Setting of a Digital offset value. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 25: Functions

    When writing is performed to [SEC] register, Internal-count-down-chain less than one second is cleared to 0. Hz1Hz) 2) [HOUR]register This register is a 24-base BCD counter (24-hour format).These registers are incremented at the timing when carry is generated from a lower register. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 26: Week Counter

    < Definition of leap years>  Leap year : year divisible by 4 , year divisible by 400 Ex. 2000,2004,2008,2012,,, 2096,2400,2800,,,  Common year: year indivisible by 4, year divisible by 100 Ex. 2001,2002,2003,2005,,, 2099,2100,2200,2300,2500,, RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 27: Wakeup Timer Interrupt Function

    When selected 4,096 Hz / 64 Hz / 1Hz as a source clock, one period of error occurs at the maximum. When selected1/60 Hz / 1/3600 Hz as a source clock, 1 Hz of error occurs at the maximum. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 28 The countdown that starts when the TE bit value changes from "0"to "1" always begins from the preset value. 4) TF bit(Timer Flag) This is a flag bit that retains the result when a wakeup timer interrupt event is detected. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 29 Setting of TSTP value becomes invalid, and the count does not stop even if set it in TSTP="1". The count stops at the time of the setting of 64 Hz, 1 Hz,1/60 Hz,1/3600 Hz. It doesn’t start counting RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 30: Wakeup Timer Start Timing

    Counting down of the wakeup timer value starts at the rising edge of the SCL (ACK output) signal that occurs when the TE value is changed from "0" to "1". WADA TSEL1 TSEL0 TSEL2 SDA(Master） SDA (Slave） Internal timer / IRQ pin Count down Figure 19 Wakeup timer start sequence RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 31: Wakeup Timer Interrupt Interval (Example)

    Source clock TF Flag 4096 Hz 64 Hz 1 Hz 16-bit counter 1/60 Hz 1/3600 Hz Timer Control /tRTN Circuit TSEL[2:0] TF ( “0” clear ) Figure 20 Wakeup timer inner block diagram RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 32 (6) As long as /IRQ=low, the /IRQ pin status does not change, even if the UF bit value changes from "1"to "0". (7) When /IRQ=low, the /IRQ pin status changes from low to Hi-Z as soon as the UIE bit value changes from "1" to "0". RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 33: Alarm Interrupt Function

    2) WADA bit(Week Alarm / Day Alarm Select) The alarm interrupt function uses either "Day" or "Week" as its target. The WADA bit is used to specify either WEEK or DAY as the target for alarm interrupt events. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 34: Examples Of Alarm Settings

    AE bit = 1 30 h each hour  Hour value is ignored Every day, at 6:59 AM 18 h 59 h        : Don't care RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 35 Figure 22 Alarm interrupt inner block diagram "1" AIE bit "0" Hi-z /IRQ output "L" "1" AF bit "0" Event occurs I nternal operation Write operation Figure 23 Alarm Interrupt time chart RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 36: Time Update Interrupt Function

    When a time update interrupt event occurs, low-level output from the /IRQ pin occurs only when the UIE bit value is "1". Earliest 7.57ms after the interrupt occurs, the /IRQ status is automatically cleared (/IRQ status changes from low to Hi-Z). RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 37: Time Update Interrupt Function Diagram

    Figure 24 Time update inner block diagram "1" UIE bit "0" Hi-z /IRQ output "L" tRTN "1" UF bit "0" period period period period Carry I nternal operation Write operation Figure 25 Time update time chart RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 38: Oscillation Stop Detection Function

    At the time of the initial power-on, “0” is set to FSEL1, FSEL0 by Power-On-Reset.. Note: The effect of STOP bit to FOUT functions. When STOP = "1", 32.768 kHz and 1024 Hz output is possible. But 1 Hz output is disabled. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 39: Battery Backup Switchover Function

    0.85 V / 10 mA Typ.  VR = 5.5 V, -40 C +85 C Diode IR 5 nA Max. Use a secondary battery, EDLC, etc, with the charge current of 40 mA or less. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 40: Reference Characteristics Of The Charge Current

    Vdef (V) Vdef (V) Figure 27 V charge current characteristics V = 3.0 V, 5.5 V 15.4 Re-Chargeable battery Voltage Current features Power Battery SW2B SW2A Supply RX8130CE Figure 28 Re-chargeable battery connection RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 41: Related Register Of Battery Backup Switchover Function

    C, FOUT function is available while V > V CHGEN bit function is enabled. Figure 29 Non re-chargeable battery SW1, SW2 control (INIEN:1, CHGEN:0) Figure 30 Non Re-chargeable battery SW1, SW2 control (INIEN = 1, CHGEN = 0) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 42 15 Battery backup switchover function Figure 31 Re-chargeable battery SW1, SW2 control (INIEN = 1, CHGEN = 1) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 43 15 Battery backup switchover function Figure 32 Battery backup (SW1, SW2 automatic control) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 44 DET1 DET2 SW1 Off time. * 00b (default) 2 ms 2 ms 2 ms 16 ms 16 ms 2 ms 128 ms 128 ms 2 ms 256 ms 256 ms 2 ms RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 45 2) is activated once every 31.25 ms. Note: Re-chargeable battery is charged through diode during1 the term of SW1 = OFF. Longer this term (ex. 256 ms) makes decreasing battery charging efficiency. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 46: Detection Voltage Setting

    The full-charge detection (V ) and low-V detection (V ) control SW2. DET3 DET4 Table 39 BFVSEL1, BFVSEL0 BFVSEL1 BFVSEL0 Description 3.02 V (default) 3.08 V 2.92 V OFF (Charging without limit) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 47 As a result, power supply switching becomes insufficient, and there is the possibility that a leak current occurs. When STOP=1 and shift to backup-mode, clear the STOP bit to 0 after V -ON immediately. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 48: Power Supply Control

    15 Battery backup switchover function 15.7. Power supply control By setting battery backup registers (INIEN, CHGEN), the RX8130CE operates like following either in re- chargeable battery or non-re-chargeable battery operation. Figure 35 Re-chargeable battery operation Figure 36 Non re-chargeable battery operation...

  • Page 49: Main Power Supply

    /RST output When full charge detection was deactivated (V 3) by register setting, V is only charged if V Figure 37 I C, FOUT operation during voltage drop and rise RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 50: Backup Power Supply

    Adjustment by register setting is possible 3.1 V low voltage flag “0” “1” VBLF   V Charge enable: +V and V Charge stop Figure 38 Re-chargeable battery operation during voltage rise and down RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 51: Reset Output Function

    Data Description The RSF is cleared to 0 and waiting for next low voltage detection. Write Invalid (writing a 1 will be ignored) Read A voltage drops below -V 1 was detected. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 52: Digital Offset Function

    +192.26 +189.21     +6.10 +3.05 0.00 3.05 6.10     192.26 195.31 The offset value is calculated on basis of a shift of the built-in crystal frequency. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 53: Effect Of The Digital Offset Function To Other Functions

    Once in 10 seconds, the period fluctuates. 64 Hz or 1 Hz source clock setting: When the timer intervals are long, the fluctuations appear small.  Not affected. 4096 Hz source clock setting: RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 54: Flow-Chart

    Dummy-read. Dummy read is one time read access to a free address Dummy-read Ignore ACK / NACK from RX8130CE in Dummy-read. VLF=1 ? Judge RX8130CE returned from backup normally, or fail. When the power conditions for which the power-on reset is Software reset executed are not satisfied, execute a software reset.

  • Page 55: Software Reset

    Please care /RST active signal. And a VLF bit is set to 1. Please clear VLF to 0. 12) Wait 125 ms Software Reset complete Next process Figure 40 Example Flow(Software Reset) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 56: Example Of Initialization Routine

    "0" to the TE and TIE bits. Configure the Update interrupt function.  Update interrupt function When initialization is finished, be sure to set STOP bit to “0”. Next processing Figure 41 Example flow (Initialization) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 57: Example Of Initialization Routine (Only Clock Usage)

    Please note that [ clock is started at the time of writing [second ] ] in case STOP bit is not used. While STOP = 1, please be aware that the functions such as the voltage detection function stop. Figure 43 Example flow (Clock, calendar setting) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 58: The Reading Of The Clock And Calendar

    2 When you want to restart from a pre-set value, please set a TE bit to “1” again after setting a TE bit to “0”. Figure 45 Example flow (Wakeup timer interruption) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 59: Setting Example Of The Alarm Interrupt Function

     Select week or day in WADA bit Reg-1Ch  Clear AF bit Reg-1Dh  Select and set /IRQ1 output in AIE bit. Reg1Eh Next process Figure 46 Example flow (Alarm interruption) RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 60: Serial Communication

    During in actual data transmission, the transmitted data contains the slave address and the data with R/W Slave address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 is Write mode 1 is Read mode RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 61: System Configuration

    In the case of this RTC module, controllers such as a CPU are defined as master devices and the RTC module is defined as a slave device. When a device is used for both transmitting and receiving data, it is defined as either a transmitter or receiver depending on these conditions. RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 62: I 2 C-Bus Protocol

    (6) CPU transfers RESTART condition [Sr] (in which case, CPU does not transfer a STOP condition [P]). (7) CPU transfers RX8130'CEs slave address with the R/W bit set to read mode. (8) Check for ACK signal from RX8130CE (from this point on, the CPU is the receiver and the RX8130 is the transmitter).
  • Page 63 (1) CPU transfers start condition [S]. (2) CPU transmits the RX8130CE's slave address with the R/W bit set to read mode. (3) Check for ACK signal from RX8130CE (from this point on, the CPU is the receiver and the RX8130CE is the transmitter).

  • Page 64: Circuit Diagram Connection

    20 Circuit Diagram connection 20 Circuit Diagram connection 20.1 Typical MCU connection Figure 49 Typical MCU connection RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 65: Khz Oscillator Application Connection

    20 Circuit Diagram connection 20.2 32.768 kHz oscillator application connection  See also 14.6. FOUT function Figure 50 32.768 kHz oscillator connection RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 66: Tables

    Table 35 INIEN bit ............................40 Table 36 Voltage detection timing ......................43 Table 37 VDET3, VDET4 intermittent detection period ................43 Table 38 VDET1,VDET2,VDET3,VDET4 setting ..................45 Table 39 BFVSEL1, BFVSEL0 ........................45 RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 67: Figures

    Figure 30 Non Re-chargeable battery SW1, SW2 control (INIEN = 1, CHGEN = 0) ......... 40 Figure 31 Re-chargeable battery SW1, SW2 control (INIEN = 1, CHGEN = 1) ........41 Figure 32 Battery backup (SW1, SW2 automatic control) ................42 RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...
  • Page 68 Figure 46 Example flow (Alarm interruption) ....................58 Figure 47 C-Bus start/stop timing ......................59 Figure 48 I C-Bus connection ........................60 Figure 49 Typical MCU connection......................63 Figure 50 32.768 kHz oscillator connection....................64 RX8130CE Jump to Bottom Seiko Epson Corporation ETM50E-07...

  • Page 69: Contacts

    Epson Hong Kong Ltd. Unit 715-723 7/F Trade Square, 681 Cheung Sha Wan Road, Kowloon, Hong Kong www.epson.com.hk Epson Taiwan Technology & Trading Ltd. 15F, No.100, Songren Rd., Sinyi Dist.,Taipei City, 11073 Taiwan www.epson.com.tw/ElectronicComponent Epson Singapore Pte., Ltd. Electronic Devices Sales Division Alexandra Technopark Block B, #04-01/04 438B Alexandra Rd, Singapore 119968 www.epson.com.sg/electronic-devices...

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