Serial Interfaces Configuration; Asynchronous Serial Interface (Uart) - u-blox LISA-C2 Series System Integration Manual

1.9.1 Serial interfaces configuration

UART and USB serial interfaces are available as AT command interface and for Packet-Switched Data
communication. The serial interfaces are configured as described in Table 12 (for information about further
settings, refer to the u-blox C2 series AT Commands Manual [3]).
The UART is a 5 wire implementation, therefore DTR, DSR and DCD functions are not available.
Interface AT Settings
UART interface Enabled
AT+IPR=115200
USB interface Enabled
Table 12: Default serial interfaces configuration

1.9.2 Asynchronous serial interface (UART)

The UART interface is a 5-wire unbalanced asynchronous serial interface that provides AT commands interface
and PSD data communication.
The UART interface provides RS-232 functionality conforming to the ITU-T V.24 Recommendation (more details
available in ITU Recommendation [5]), with CMOS compatible signal levels: 0 V for low data bit or ON state, and
1.8/2.8 V for high data bit or OFF state. One external voltage translator (e.g. Maxim MAX13234E) could be used
to provide RS-232 (5 lines) compatible signal levels. This chip translates the voltage levels from 1.8 V (module
side) to the RS-232 standard. For detailed electrical characteristics, refer to the LISA-C2 series Data Sheet [1], or
the FW75-C200 Data Sheet [2].
FW75-C200 logic levels are 2.8 V interface. LISA-C200 logic levels are 1.8 V interface.
The signal names of the LISA-C200 and FW75-C200 modules UART interface conform to the ITU-T V.24
Recommendation [5].
UART interfaces include the following lines:
Name Description
RI
Ring Indicator
RTS Ready to send
CTS
Clear to send
TxD Transmitted data
UBX-13000620 - R21
LISA-C2 series and FW75-C200 - System Integration Manual
Comments
Multiplexing mode can be enabled by AT+CMUX command providing following channels:
Channel 0: control channel
•
Channel 1: AT commands
•
Channel 2: data connection
•
Baud rate: 115200 b/s
Frame format: 8 bits, no parity, 1 stop bit
Remarks
Module output
Module hardware flow control input
Circuit 105 (Request to send) in ITU-T V.24
FW75-C200 - Internal active pull-up to V_INT (2.8 V) interface.
LISA-C200- Internal active pull-up to V_INT (1.8 V) interface.
Module hardware flow control output
Circuit 106 (Ready for sending) in ITU-T V.24
FW75-C200 - Internal active pull-up to V_INT (2.8 V) interface.
LISA-C200- Internal active pull-up to V_INT (1.8 V) interface.
Module data input
Circuit 103 (Transmitted data) in ITU-T V.24
Internal active pull-up to V_INT (2.8 V) enabled.
FW75-C200 - Internal active pull-up to V_INT (2.8 V) interface.
LISA-C200- Internal active pull-up to V_INT (1.8 V) interface.
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