Denkovi DAEnetIP2 v2 User Manual page 31

x.9.1.121.9.0 aevPin1Inv
x.9.1.121.10.0 aevPin2Inv
x.9.1.121.11.0 aevPin3Inv
x.9.1.121.12.0 aevPin4Inv
x.9.1.121.13.0 aevPin5Inv
x.9.1.121.14.0 aevPin6Inv
x.9.1.121.15.0 aevPin7Inv
x.9.1.121.16.0 aevPin8Inv
9.4. Control port P3 (Digital outputs)
OID Name
x.9.2.1.1.0 pctrlP3pin1
x.9.2.1.2.0 pctrlP3pin2
x.9.2.1.3.0 pctrlP3pin3
x.9.2.1.4.0 pctrlP3pin4
x.9.2.1.5.0 pctrlP3pin5
x.9.2.1.6.0 pctrlP3pin6
x.9.2.1.7.0 pctrlP3pin7
x.9.2.1.8.0 pctrlP3pin8
x.9.2.1.33.0 pctrlP3byte
pin when voltage is
compared to
thresholds
read-write Invert respective pin
for P5 on analog
event
read-write Invert respective pin
for P5 on analog
event
read-write Invert respective pin
for P5 on analog
event
read-write Invert respective pin
for P5 on analog
event
read-write Invert respective pin
for P5 on analog
event
read-write Invert respective pin
for P5 on analog
event
read-write Invert respective pin
for P5 on analog
event
read-write Invert respective pin
for P5 on analog
event
Access Description
read-write Port3 pin1 data
read-write Port3 pin2 data
read-write Port3 pin3 data
read-write Port3 pin4 data
read-write Port3 pin5 data
read-write Port3 pin6 data
read-write Port3 pin7 data
read-write Port3 pin8 data
read-write I/O port data as single
DAEnetIP2 v2 User Manual
INTEGER { None(0),
Inverted(1) }
INTEGER { None(0),
Inverted(1) }
INTEGER { None(0),
Inverted(1) }
INTEGER { None(0),
Inverted(1) }
INTEGER { None(0),
Inverted(1) }
INTEGER { None(0),
Inverted(1) }
INTEGER { None(0),
Inverted(1) }
INTEGER { None(0),
Inverted(1) }
Table 9.4. Control port P3
Syntax
INTEGER { High(1), Low(0) }
INTEGER { High(1), Low(0) }
INTEGER { High(1), Low(0) }
INTEGER { High(1), Low(0) }
INTEGER { High(1), Low(0) }
INTEGER { High(1), Low(0) }
INTEGER { High(1), Low(0) }
INTEGER { High(1), Low(0) }
INTEGER(0..255)
21 Apr 2020
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