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Schematic Diagrams
VGA Frame Buffer B
D
Sheet 15 of 59
VGA Frame Buffer
B
C
FBVDDQ 1uF x 18
FBVDDQ 10uF x 6
FBVDDQ 22uF x 5
B
VRAM
A
VRAM
B - 16 VGA Frame Buffer B
5
4
11
FBB_D[63:32]
M13A
NORMAL
FBB_D42
B4
DQ0_A
FBB_D43
A3
DQ1_A
FBB_D40
B3
DQ2_A
FBB_D41
B2
DQ3_A
FBB_D44
E3
DQ4_A
FBB_D47
E2
DQ5_A
FBB_D46
F2
DQ6_A
FBB_D45
G2
DQ7_A
FBB_EDC5
C2
EDC0_A
FBB_DBI5
D2
DBI0_A
11
FBB_W CK67
D4
11
FBB_W CKB45
WCK0_t_A
11
FBB_W CK67#
D5
WCK0_c_A
11
FBB_W CKB45#
x16
x8
FBB_D34
B11
NC
FBB_D35
DQ8_A
A12
NC
DQ9_A
FBB_D32
B12
NC
DQ10_A
FBB_D33
B13
NC
DQ11_A
FBB_D36
E12
DQ12_A
NC
FBB_D37
E13
DQ13_A
NC
FBB_D39
F13
NC
DQ14_A
FBB_D38
G13
NC
DQ15_A
FBB_EDC4
C13
EDC1_A
GND
11
FBB_W CKB67
FBB_DBI4
D13
DBI1_A
11
FBB_W CKB67#
NC
D11
WCK1_t_A
NC
11
FBB_W CK45
D10
11
FBB_W CK45#
WCK1_c_A
NC
K4Z80325BC-HC14 (16*256M*2CH)
P/N =
VRAM
11
FBB_DBI[7:4]
11
FBB_EDC[7:4]
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7
FBVDDQ
Close to DRAM
Around DRAM
cost del,Ivy10/11
C72
C80
C67
C68
C83
C57
C591
C589
C89
C65
C60
VRAM
VRAM
VRAM
VRAM
VRAM
VRAM
VRAM
VRAM
VRAM
GND
FBVDDQ
C46
C51
C53
C47
C49
C579
C581
C583
C584
C587
C586
C585
VRAM
VRAM
VRAM
VRAM
VRAM
VRAM
VRAM
VRAM
VRAM
VRAM
VRAM
GND
5
4
3
M13C
11,14
FBB_CMD[33:0]
FBB_CMD29
H3
CA0_A
FBB_CMD31
G11
CA1_A
FBB_CMD16
G4
CA2_A
FBB_CMD25
H12
CA3_A
FBB_CMD22
H5
CA4_A
FBB_CMD21
H10
CA5_A
FBB_CMD24
J12
CA6_A
M13B
FBB_CMD23
J11
CA7_A
FBB_CMD26
J4
CA8_A
FBB_CMD17
NORMAL
J3
CA9_A
FBB_CMD30
J5
CABI_A
FBB_CMD33
G10
x16
x8
CKE_A
FBB_D50
U4
DQ0_B
NC
FBB_D49
V3
DQ1_B
NC
FBB_D51
U3
DQ2_B
NC
FBB_D48
U2
DQ3_B
NC
FBB_D52
P3
DQ4_B
NC
FBB_D55
P2
DQ5_B
NC
FBB_D53
N2
DQ6_B
NC
FBB_D54
FBB_CMD27
M2
L3
DQ7_B
NC
CA0_B
FBB_CMD28
M11
CA1_B
FBB_EDC6
FBB_CMD19
T2
M4
EDC0_B
GND
CA2_B
FBB_DBI6
FBB_CMD20
R2
L12
DBI0_B
NC
CA3_B
FBB_CMD22
L5
CA4_B
FBB_CMD21
R4
L10
WCK0_t_B
NC
CA5_B
R5
FBB_CMD24
K12
WCK0_c_B
NC
CA6_B
FBB_CMD23
K11
CA7_B
FBB_D57
FBB_CMD26
U11
K4
DQ8_B
CA8_B
FBB_D56
FBB_CMD17
V12
K3
DQ9_B
CA9_B
FBB_D58
U12
FBB_CMD30
K5
DQ10_B
CABI_B
FBB_D59
FBB_CMD33
U13
M10
DQ11_B
CKE_B
FBB_D61
P12
DQ12_B
FBB_D60
P13
DQ13_B
FBB_D63
N13
DQ14_B
FBB_D62
M13
DQ15_B
FBB_EDC7
FBB_CMD18
T13
J1
EDC1_B
RESET
FBB_DBI7
R13
DBI1_B
R11
WCK1_t_B
R10
K10
WCK1_c_B
CLK_c
11
FBB_CLK1#
J10
CLK_t
11
FBB_CLK1
K4Z80325BC-HC14 (16*256M*2CH)
COMMON
P/N =
VRAM
FBB_EDC4
FBB_EDC5
K4Z80325BC-HC14 (16*256M*2CH)
FBB_EDC6
COMMON
FBB_EDC7
P/N =
VRAM
Directly under DRAM
FBVDDQ
C62
C82
C70
VRAM
VRAM
VRAM
VRAM
FBVDDQ
GND
C66
C59
C71
VRAM
VRAM
10,12,13,14,16,17,19,54,55
VRAM
11,12,13,14,19,20,53
GND
3
2
1
M13D
K1
VREFC
FBB_VREFC
14
C582
A11
A1
VSS
VDD
0.01u_16V_X7R_04
A13
A14
VSS
VDD
VRAM
A2
E10
VSS
VDD
A4
E5
VSS
VDD
B1
H13
VSS
VDD
B14
H2
VSS
VDD
C10
L13
VSS
VDD
C12
L2
VSS
VDD
C3
P10
VSS
VDD
C5
P5
VSS
VDD
N5
D1
V1
TCK
VSS
VDD
F10
D12
V14
TDI
VSS
VDD
N10
D14
TDO
VSS
F5
D3
TMS
VSS
E11
VSS
E4
VSS
F1
VSS
F12
VSS
F14
B10
VSS
VDDQ
F3
B5
VSS
VDDQ
G1
C1
VSS
VDDQ
G12
C11
VSS
VDDQ
G14
C14
VSS
VDDQ
G3
C4
VSS
VDDQ
H11
E1
VSS
VDDQ
H4
E14
VSS
VDDQ
L11
F11
VSS
VDDQ
L4
F4
VSS
VDDQ
FBB_ZQ_2_A
J14
M1
H1
ZQ_A
VSS
VDDQ
FBB_ZQ_2_B
K14
M12
H14
ZQ_B
VSS
VDDQ
M14
J13
VSS
VDDQ
M3
J2
VSS
VDDQ
R300
R302
N1
K13
VSS
VDDQ
N12
K2
VSS
VDDQ
121_1%_04
121_1%_04
N14
L1
VSS
VDDQ
N3
L14
VRAM
VRAM
VSS
VDDQ
P11
N11
VSS
VDDQ
P4
N4
VSS
VDDQ
R1
P1
VSS
VDDQ
R12
P14
VSS
VDDQ
R14
T1
VSS
VDDQ
G5
R3
T11
RFU_A
VSS
VDDQ
M5
T10
T14
RFU_B
VSS
VDDQ
T12
T4
VSS
VDDQ
T3
U10
VSS
VDDQ
T5
U5
VSS
VDDQ
U1
VSS
U14
VSS
V11
VSS
V13
VSS
V2
VSS
V4
VSS
A10
VPP
A5
VPP
V10
VPP
V5
VPP
K4Z80325BC-HC14 (16*256M*2CH)
COMMON
1V8 AON 1uF x 4
P/N =
VRAM
OPTION, Under DRAM
1V8_AON
C61
C52
C58
C55
VRAM
VRAM
VRAM
VRAM
1V8_AON
FBVDDQ
Title
Title
Title
[15] VGA Frame Buffer B
[15] VGA Frame Buffer B
[15] VGA Frame Buffer B
Size
Size
Size
Document Number
Document Number
Document Number
6-71-NP500-D02
6-71-NP500-D02
6-71-NP500-D02
A3
A3
A3
N18P
N18P
N18P
Date:
Date:
Date:
Monday, February 24, 2020
Monday, February 24, 2020
Monday, February 24, 2020
Sheet
Sheet
Sheet
2
1
FBVDDQ
D
FBVDDQ
C
1V8_AON
B
A
R e v
R e v
R e v
D02
D02
D02
15
15
15
o f
o f
o f
59
59
59
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