Pin definition:
UT4B0 data / power interface is designed with 8 Pin (2 × 4) pins, with a standard
spacing of 2mm.
2.1 Pin Definition
No
Pin
1
ANT_PWR
2
VCC
3
TXD
4
RST
5
RXD
6
1PPS
7
Reserved/1PPS2
8
GND
2.2 Electrical Characteristics
Maximum Absolute Rating
Parameter
Supply voltage (VCC)
Input pin voltage
LNA power supply (antenna)
VCC maximum ripple
Input pin voltage (all other
pins except those mentioned
above)
Maximum ESD Stress
UC-00-M24 EN R2
8
7
6
5
4
3
2
1
Pin Layout
I/O
Description
Antenna DC power
I
3.3V DC power
I
Transmit, LVCMOS logic level
O
Hardware reset, active low
I
Receive, LVCMOS logic level
I
1PPS, LVCMOS logic level
O
Reserved/1PPS2
I
Ground
I
Symbol
Min
Vcc
-0.3
Vin
-0.3
ANT_PWR
-0.3
Vrpp
0
Vin
-0.3
VES (HBM)
Hardware
Max
Units
3.6
V
VCC+0.2
V
6
V
50
mV
3.6
V
± 2000
V
5
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