Hardware Features; Msp430G2553 20-Pin N Package (Top View) - Texas Instruments LaunchPad MSP430G2553 User Manual

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2.2

Hardware Features

2.2.1 MSP430G2553 MCU
The MSP430G2553 is a part of the MSP430 family of ultra-low-power MCUs that consists of several
devices featuring different sets of peripherals targeted for various applications. The architecture, combined
with five low-power modes, is optimized to achieve extended battery life in portable measurement
applications.
Device features include:
• 1.8-V to 3.6-V operation
• 16-Bit RISC architecture up to 16-MHz system clock
• 16KB of flash memory and 512 bytes of SRAM
• 8-channel 10-bit ADC
• 8-channel comparator
• Two 16-Bit Timers with three capture/compare registers (Timer_A)
• 24 GPIOs
• One universal serial communication interfaces (USCI_A) supports UART, IrDA, and SPI
• One USCI (USCI_B) supports SPI and I
Figure 4 shows the pinout of the MSP430G2553 20-pin N (PDIP) package.
P1.1/TA0.0/
P1.2/TA0.1/
P1.3/ADC10CLK/CAOUT/VREF-/VEREF-/A3/CA3
P1.4/SMCLK/ UCB0STE/UCA0CLK
P1.5/TA0.0/ UCB0CLK/UCA0STE
2.2.2 eZ-FET Onboard Debug Probe With EnergyTrace Technology
To keep development easy and cost effective, TI's LaunchPad Development Kits integrate an onboard
debug probe, which eliminates the need for expensive programmers. The MSP-EXP430G2ET has the eZ-
FET debug probe (see
device derivatives.
SLAU772 – June 2018
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2
C
DVCC
1
P1.0/TA0CLK/ACLK/A0/CA0
2
UCA0RXD/UCA0SOMI / A1/CA1
3
UCA0TXD/UCA0SIMO / A2/CA2
4
5
/VREF+/VEREF+/A4/ CA4/TCK
6
/ A5/CA5/TMS
7
P2.0/TA1.0
8
P2.1/TA1.1
9
P2.2/TA1.1
10
Figure 4. MSP430G2553 20-Pin N Package (Top View)
Figure 5), which is a simple and low-cost debugger that supports all MSP430
MSP430G2553 LaunchPad™ Development Kit (MSP ‑ EXP430G2ET)
Copyright © 2018, Texas Instruments Incorporated
DVSS
20
XIN/P2.6/TA0.1
19
XOUT/P2.7
18
TEST/SBWTCK
17
RST/NMI/SBWTDIO
16
P1.7/CAOUT /UCB0SIMO/UCB0SDA
15
P1.6/TA0.1/ UCB0SOMI/UCB0SCL/A6/
14
P2.5/TA1.2
13
P2.4/TA1.2
12
P2.3/TA1.0
11
Hardware
/A7/CA7/TDO/TDI
CA6/TDI/TCLK
7