Texas Instruments MSP430F5638 Manual
Texas Instruments MSP430F5638 Manual

Texas Instruments MSP430F5638 Manual

Mixed signal microcontroller
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Samples: MSP430F5638, MSP430F5637, MSP430F5636, MSP430F5635, MSP430F5634, MSP430F5633, MSP430F5632, MSP430F5631,
FEATURES
1
• Low Supply Voltage Range: 1.8 V to 3.6 V
23
Ultralow-Power Consumption
– Active Mode (AM):
All System Clocks Active:
270 µA/MHz at 8 MHz, 3.0 V, Flash Program
Execution (Typical)
– Standby Mode (LPM3):
Watchdog With Crystal and Supply
Supervisor Operational, Full RAM
Retention, Fast Wake-Up:
1.8 µA at 2.2 V, 2.1 µA at 3.0 V (Typical)
– Shutdown RTC Mode (LPM3.5):
Shutdown Mode, Active Real-Time Clock
With Crystal:
1.1 µA at 3.0 V (Typical)
– Shutdown Mode (LPM4.5):
0.3 µA at 3.0 V (Typical)
Wake Up From Standby Mode in 3 µs (Typical)
16-Bit RISC Architecture, Extended Memory,
Up to 20-MHz System Clock
Flexible Power Management System
– Fully Integrated LDO With Programmable
Regulated Core Supply Voltage
– Supply Voltage Supervision, Monitoring,
and Brownout
Unified Clock System
– FLL Control Loop for Frequency
Stabilization
– Low-Power Low-Frequency Internal Clock
Source (VLO)
– Low-Frequency Trimmed Internal Reference
Source (REFO)
– 32-kHz Crystals (XT1)
– High-Frequency Crystals Up to 32 MHz
(XT2)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
MSP430, Code Composer Studio are trademarks of Texas Instruments.
2
All other trademarks are the property of their respective owners.
3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Mixed Signal Microcontroller
Check for
MSP430F5630
MSP430F5638, MSP430F5637, MSP430F5636
MSP430F5635, MSP430F5634, MSP430F5633
MSP430F5632, MSP430F5631, MSP430F5630
SLAS650D – JUNE 2010 – REVISED AUGUST 2013
Four 16-Bit Timers With 3, 5, or 7
Capture/Compare Registers
Two Universal Serial Communication
Interfaces
– USCI_A0 and USCI_A1 Each Support:
– Enhanced UART Supports Auto-
Baudrate Detection
– IrDA Encoder and Decoder
– Synchronous SPI
– USCI_B0 and USCI_B1 Each Support:
2
– I
C
– Synchronous SPI
Full-Speed Universal Serial Bus (USB)
– Integrated USB-PHY
– Integrated 3.3-V and 1.8-V USB Power
System
– Integrated USB-PLL
– Eight Input and Eight Output Endpoints
12-Bit Analog-to-Digital Converter (ADC) With
Internal Shared Reference, Sample-and-Hold,
and Autoscan Feature
Dual 12-Bit Digital-to-Analog Converters
(DACs) With Synchronization
Voltage Comparator
Hardware Multiplier Supporting 32-Bit
Operations
Serial Onboard Programming, No External
Programming Voltage Needed
Six-Channel Internal DMA
Real-Time Clock Module With Supply Voltage
Backup Switch
Family Members are Summarized in
For Complete Module Descriptions, See the
MSP430x5xx and MSP430x6xx Family User's
Guide (SLAU208)
Copyright © 2010–2013, Texas Instruments Incorporated
Table 1

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Summary of Contents for Texas Instruments MSP430F5638

  • Page 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. MSP430, Code Composer Studio are trademarks of Texas Instruments.
  • Page 2 Hand-Held Meters DESCRIPTION The Texas Instruments MSP430™ family of ultralow-power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency.
  • Page 3 MSP430F5638, MSP430F5637, MSP430F5636 MSP430F5635, MSP430F5634, MSP430F5633 MSP430F5632, MSP430F5631, MSP430F5630 www.ti.com SLAS650D – JUNE 2010 – REVISED AUGUST 2013 Functional Block Diagram, MSP430F5638, MSP430F5637, MSP430F5636 XIN XOUT RST/NMI P1.x P2.x P3.x P4.x P5.x P6.x P7.x P8.x P9.x XT2IN I/O Ports I/O Ports...
  • Page 4 5 CC each with 7 CC 1.5V, 2.0V, Battery 3 CC 2.5V Registers Registers Backup Port PJ Registers System Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 5 P4.7/TB0OUTH/SVMOUT P2.3/P2MAP3 P4.6/TB0.6 P2.4/P2MAP4 P4.5/TB0.5 P2.5/P2MAP5 P4.4/TB0.4 P2.6/P2MAP6 P4.3/TB0.3 P2.7/P2MAP7 P4.2/TB0.2 DVCC1 P4.1/TB0.1 NOTE: DNC = Do not connect Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 6: Table Of Contents

    P4.7/TB0OUTH/SVMOUT P2.3/P2MAP3 P4.6/TB0.6 P2.4/P2MAP4 P4.5/TB0.5 P2.5/P2MAP5 P4.4/TB0.4 P2.6/P2MAP6 P4.3/TB0.3 P2.7/P2MAP7 P4.2/TB0.2 DVCC1 P4.1/TB0.1 NOTE: DNC = Do not connect Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 7 P2.2/P2MAP2 P2.3/P2MAP3 P4.6/TB0.6 P2.4/P2MAP4 P4.5/TB0.5 P2.5/P2MAP5 P4.4/TB0.4 P2.6/P2MAP6 P4.3/TB0.3 P2.7/P2MAP7 P4.2/TB0.2 DVCC1 P4.1/TB0.1 NOTE: DNC = Do not connect Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 8 Pin Designation, MSP430F5638IZQW, MSP430F5637IZQW, MSP430F5636IZQW, MSP430F5635IZQW, MSP430F5634IZQW, MSP430F5633IZQW, MSP430F5632IZQW, MSP430F5631IZQW, MSP430F5630IZQW ZQW PACKAGE (TOP VIEW) NOTE: For terminal assignments, see Table 2 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 9: P6.4/Cb4/A4

    AVSS2 Analog ground supply (1) I = input, O = output, N/A = not available on this package offering Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 10 (2) VCORE is for internal use only. No external current loading is possible. VCORE should only be connected to the recommended capacitor value, C VCORE Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 11 P4.7/TB0OUTH/SVMOUT Timer TB0: Switch all PWM outputs high impedance SVM output General-purpose digital I/O P8.0/TB0CLK Timer TB0 clock input Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 12 Capacitor for backup subsystem. Do not load this pin externally. For capacitor VBAK values, see C Recommended Operating Conditions. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 13 Reserved. It is recommended to connect to ground (DVSS, AVSS). (3) When this pin is configured as reset, the intermal pullup resistor is enabled by default. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 14 MSP430Ware also includes a high-level API called MSP430 Driver Library. This library makes it easy to program MSP430 hardware. MSP430Ware is available as a component of CCS or as a standalone package. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 15 TI Embedded Processors Wiki Texas Instruments Embedded Processors Wiki. Established to help developers get started with embedded processors from Texas Instruments and to foster innovation and growth of general knowledge about the hardware and software surrounding these devices. Device and Development Tool Nomenclature To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all MSP430™...
  • Page 16 Optional: Additional Features *-EP = Enhanced Product (-40°C to 105°C) *-HT = Extreme Temperature Parts (-55°C to 150°C) Figure 1. Device Nomenclature Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 17 R10 + 2 → R10 Immediate MOV #X,TONI MOV #45,TONI #45 → M(TONI) (1) S = source, D = destination Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 18 Low-power mode 4.5 (LPM4.5) – Internal regulator disabled – No data retention – Wakeup from RST/NMI, RTC_B, P1, P2, P3, and P4 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 19 (4) Only on devices with peripheral module ADC12_A, otherwise reserved. (5) Only on devices with peripheral module DAC12_A, otherwise reserved. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 20 (2) Backup RAM is accessed via the control registers BAKMEM0, BAKMEM1, BAKMEM2, and BAKMEM3. (3) USB RAM can be used as general purpose RAM when not used for USB operation. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 21 User's Guide (SLAU278). For a complete description of the features of the JTAG interface and its implementation, see MSP430 Programming Via the JTAG Interface (SLAU320). Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 22 There are 8 bytes of Backup RAM available on MSP430F563x. It can be wordwise accessed via the control registers BAKMEM0, BAKMEM1, BAKMEM2, and BAKMEM3. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 23 USCI_A0 SPI slave transmit enable (direction controlled by USCI - input) PM_MCLK MCLK Reserved Reserved for test purposes. Do not use this setting. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 24 (the device is automatically reset) and supply voltage monitoring (the device is not automatically reset). SVS and SVM circuitry is available on the primary supply and core supply. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 25: Msp430F5632 Msp430F5631 Msp430F5630

    KEYV flash key violation (PUC) Reserved Peripheral area fetch (PUC) PMM key violation (PUC) Reserved 22h to 3Eh Lowest Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 26: Msp430F5632 Msp430F5631 Msp430F5630

    0Ah to 1Eh Lowest No interrupt pending SYSBERRIV, Bus Error USB wait state timeout 0198h Highest Reserved 04h to 1Eh Lowest Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 27: Msp430F5632 Msp430F5631 Msp430F5630

    (2) Only on devices with peripheral module ADC12_A. Reserved on devices without ADC. (3) Only on devices with peripheral module DAC12_A. Reserved on devices without DAC. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 28: Msp430F5632 Msp430F5631 Msp430F5630

    CCR3 TA0.3 39-P1.5 L6-P1.5 TA0.4 CCI4A 39-P1.5 L6-P1.5 CCI4B CCR4 TA0.4 (1) Only on devices with peripheral module ADC12_A. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 29: Msp430F5632 Msp430F5631 Msp430F5630

    45-P3.3 L8-P3.3 TA1.2 CCI2A 45-P3.3 L8-P3.3 ACLK CCI2B (internal) CCR2 TA1.2 (1) Only on devices with peripheral module DAC12_A. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 30: Msp430F5632 Msp430F5631 Msp430F5630

    CCI1A 48-P3.6 L9-P3.6 CBOUT CCI1B (internal) CCR1 TA2.1 49-P3.7 M10-P3.7 TA2.2 CCI2A 49-P3.7 M10-P3.7 ACLK CCI2B (internal) CCR2 TA2.2 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 31: Msp430F5632 Msp430F5631 Msp430F5630

    (1) Timer functions selectable via the port mapping controller. (2) Only on devices with peripheral module ADC12_A. (3) Only on devices with peripheral module DAC12_A. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 32: Msp430F5632 Msp430F5631 Msp430F5630

    Up to ten hardware triggers can be combined to form complex triggers or breakpoints • Two cycle counters • Sequencer • State storage • Clock control on module level Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 33: Msp430F5632 Msp430F5631 Msp430F5630

    (1) For a detailed description of the individual control register offset addresses, see the MSP430x5xx and MSP430x6xx Family User's Guide (SLAU208). Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 34: Msp430F5632 Msp430F5631 Msp430F5630

    UCS control 4 UCSCTL4 UCS control 5 UCSCTL5 UCS control 6 UCSCTL6 UCS control 7 UCSCTL7 UCS control 8 UCSCTL8 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 35: Msp430F5632 Msp430F5631 Msp430F5630

    P2IN Port P2 output P2OUT Port P2 direction P2DIR Port P2 pullup/pulldown enable P2REN Port P2 drive strength P2DS Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 36: Msp430F5632 Msp430F5631 Msp430F5630

    P6OUT Port P6 direction P6DIR Port P6 pullup/pulldown enable P6REN Port P6 drive strength P6DS Port P6 selection P6SEL Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 37: Msp430F5632 Msp430F5631 Msp430F5630

    Capture/compare register 2 TA0CCR2 Capture/compare register 3 TA0CCR3 Capture/compare register 4 TA0CCR4 TA0 expansion register 0 TA0EX0 TA0 interrupt vector TA0IV Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 38: Msp430F5632 Msp430F5631 Msp430F5630

    Capture/compare register 0 TA2CCR0 Capture/compare register 1 TA2CCR1 Capture/compare register 2 TA2CCR2 TA2 expansion register 0 TA2EX0 TA2 interrupt vector TA2IV Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 39: Product Folder Links: Msp430F5638 Msp430F5637 Msp430F5636 Msp430F5635 Msp430F5634 Msp430F5633

    MPY32H 32-bit operand 1 – signed multiply low word MPYS32L 32-bit operand 1 – signed multiply high word MPYS32H Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 40: Msp430F5632 Msp430F5631 Msp430F5630

    DMA3DAH DMA Channel 3 transfer size DMA3SZ DMA Channel 4 control DMA4CTL DMA Channel 4 source address low DMA4SAL Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 41: Msp430F5632 Msp430F5631 Msp430F5630

    UCB0I2COA USCI I2C slave address UCB0I2CSA USCI interrupt enable UCB0IE USCI interrupt flags UCB0IFG USCI interrupt vector word UCB0IV Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 42: Msp430F5632 Msp430F5631 Msp430F5630

    ADC memory-control register 5 ADC12MCTL5 ADC memory-control register 6 ADC12MCTL6 ADC memory-control register 7 ADC12MCTL7 ADC memory-control register 8 ADC12MCTL8 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 43: Msp430F5632 Msp430F5631 Msp430F5630

    Comp_B control register 2 CBCTL2 Comp_B control register 3 CBCTL3 Comp_B interrupt register CBINT Comp_B interrupt vector word CBIV Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 44: Msp430F5632 Msp430F5631 Msp430F5630

    TSREG USB frame number USBFN USB control USBCTL USB interrupt enables USBIE USB interrupt flags USBIFG Function address FUNADR Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 45: Avcc1

    (3) USB operation with USB PLL enabled requires PMMCOREVx ≥ 2 for proper operation. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 46: Msp430F5632 Msp430F5631 Msp430F5630

    Supply Voltage - V The numbers within the fields denote the supported PMMCOREVx settings. Figure 2. Frequency vs Supply Voltage Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 47: Msp430F5632 Msp430F5631 Msp430F5630

    ACLK MCLK SMCLK XTS = CPUOFF = SCG0 = SCG1 = OSCOFF = SMCLKOFF = 0. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 48: Msp430F5632 Msp430F5631 Msp430F5630

    = 32768 Hz, PMMREGOFF = 1, RTC in backup domain active, no current drawn on VBAK MCLK SMCLK ACLK Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 49: Msp430F5632 Msp430F5631 Msp430F5630

    , for all outputs combined should not exceed ±100 mA to hold the maximum voltage (OHmax) (OLmax) drop specified. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 50: Msp430F5632 Msp430F5631 Msp430F5630

    (3) The output voltage reaches at least 10% and 90% V at the specified toggle frequency. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 51: Msp430F5632 Msp430F5631 Msp430F5630

    −25.0 V – High-Level Output Voltage – V V – High-Level Output Voltage – V Figure 5. Figure 6. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 52: Msp430F5632 Msp430F5631 Msp430F5630

    −60.0 V – High-Level Output Voltage – V V – High-Level Output Voltage – V Figure 9. Figure 10. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 53: Xout

    Frequencies in between might set the flag. (8) Measured with logic-level input frequency but also applies to operation with crystals. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 54: Msp430F5632 Msp430F5631 Msp430F5630

    Frequencies in between might set the flag. (8) Measured with logic-level input frequency but also applies to operation with crystals. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 55: Msp430F5632 Msp430F5631 Msp430F5630

    (2) Calculated using the box method: (MAX(1.8 to 3.6 V) – MIN(1.8 to 3.6 V)) / MIN(1.8 to 3.6 V) / (3.6 V – 1.8 V) Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 56: Msp430F5632 Msp430F5631 Msp430F5630

    Typical DCO Frequency, V = 3.0 V, T = 25°C DCOx = 31 DCOx = 0 DCORSEL Figure 11. Typical DCO frequency Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 57: Msp430F5632 Msp430F5631 Msp430F5630

    VCORE (PMMCOREVx) setting. See the Power Management Module and Supply Voltage Supervisor chapter in the MSP430x5xx and MSP430x6xx Family User's Guide (SLAU208) on recommended settings and usage. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 58: Msp430F5632 Msp430F5631 Msp430F5630

    SVMLE = 1, PMMCOREV = 2, SVMLFP = 0 (SVML) SVMLE = 1, PMMCOREV = 2, SVMLFP = 1 µA Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 59: Msp430F5632 Msp430F5631 Msp430F5630

    Duty cycle = 50% ± 10% All capture inputs, Timer_B capture timing Minimum pulse duration required for 1.8 V, 3 V TB,cap capture Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 60: Msp430F5632 Msp430F5631 Msp430F5630

    (1) Pulses on the UART receive input (UCxRX) shorter than the UART receive deglitch time are suppressed. To ensure that pulses are correctly recognized their width should exceed the maximum specification of the deglitch time. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 61: Msp430F5632 Msp430F5631 Msp430F5630

    CKPL = 1 LO/HI LO/HI SU,MI HD,MI SOMI HD,MO VALID,MO SIMO Figure 12. SPI Master Mode, CKPH = 0 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 62: Msp430F5632 Msp430F5631 Msp430F5630

    CKPL = 1 LO/HI LO/HI HD,MI SU,MI SOMI HD,MO VALID,MO SIMO Figure 13. SPI Master Mode, CKPH = 1 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 63: Msp430F5632 Msp430F5631 Msp430F5630

    (3) Specifies how long data on the SOMI output is valid after the output changing UCLK clock edge. See the timing diagrams in Figure 14 Figure Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 64: Msp430F5632 Msp430F5631 Msp430F5630

    CKPL = 1 LO/HI LO/HI HD,SI SU,SI SIMO HD,MO STE,ACC VALID,SO STE,DIS SOMI Figure 15. SPI Slave Mode, CKPH = 1 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 65: Msp430F5632 Msp430F5631 Msp430F5630

    (3) The internal reference supply current is not included in current consumption parameter I ADC12 (4) ADC12ON = 1, REFON = 0, SHT0 = 0, SHT1 = 0, ADC12DIV = 0 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 66: Msp430F5632 Msp430F5631 Msp430F5630

    (1) Parameters are derived using the histogram method. (2) AVCC as reference voltage is selected by: SREF2 = 0, SREF1 = 0, SREF0 = 0. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 67: Msp430F5632 Msp430F5631 Msp430F5630

    (4) The on-time t is included in the sampling time t ; no additional on time is needed. VMID(on) VMID(sample) Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 68: Msp430F5632 Msp430F5631 Msp430F5630

    ADC12_A. See also the MSP430x5xx and MSP430x6xx Family User's Guide (SLAU208). Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 69: Msp430F5632 Msp430F5631 Msp430F5630

    (7) Calculated using the box method: (MAX(-40 to 85°C) – MIN(-40 to 85°C)) / MIN(-40 to 85°C)/(85°C – (–40°C)). Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 70: Msp430F5632 Msp430F5631 Msp430F5630

    + (1 + E ) × (VeREF+/4095) × DAC12_xDAT, DAC12IR = 1. DAC12_xOUT (2) This parameter is not production tested. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 71: Msp430F5632 Msp430F5631 Msp430F5630

    Gain Error = 100 pF Load Positive Negative DAC Code Figure 18. Linearity Test Load Conditions and Gain/Offset Definition Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 72: Msp430F5632 Msp430F5631 Msp430F5630

    O/P(DAC12_x) Load Load DAC12 = 100 pF Load O/P(DAC12_x) AV – 0.3 V Figure 19. DAC12_x Output Resistance Tests Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 73: Msp430F5632 Msp430F5631 Msp430F5630

    Load Load ±1/2 LSB = 100 pF Load O/P(DAC12.x) settleLH settleHL Figure 20. Settling Time and Glitch Energy Testing Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 74: Msp430F5632 Msp430F5631 Msp430F5630

    = 100 pF Load REF+ DAC12_yOUT Load Load DAC12_xOUT DAC12_1 DAC1 oggle = 100 pF Load Figure 23. Crosstalk Test Conditions Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 75: Msp430F5632 Msp430F5631 Msp430F5630

    VIN = reference into resistor ladder, (n+0.5) (n+1) (n+1.5) CB_REF n = 0 to 31 / 32 / 32 / 32 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 76: Msp430F5632 Msp430F5631 Msp430F5630

    , exceeds this value. USB_EXT (4) Does not include current contribution of Rpu and Rpd as outlined in the USB specification. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 77: Msp430F5632 Msp430F5631 Msp430F5630

    SBW,En first SBWTCK clock edge. (2) f may be restricted to meet the timing requirements of the module selected. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 78: Msp430F5632 Msp430F5631 Msp430F5630

    1: High drive P1.3/TA0.2 P1.4/TA0.3 P1IN.x P1.5/TA0.4 P1.6/TA0.1 P1.7/TA0.2 Module X IN P1IE.x P1IRQ.x P1IFG.x P1SEL.x Interrupt Edge P1IES.x Select Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 79: Msp430F5632 Msp430F5631 Msp430F5630

    Timer TA0.CCI1B capture input Timer TA0.1 output P1.7/TA0.2 7 P1.7 (I/O) I: 0; O: 1 Timer TA0.CCI2B capture input Timer TA0.2 output Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 80: P2.1/P2Map1

    1: High drive P2.3/P2MAP3 P2.4/P2MAP4 P2IN.x P2.5/P2MAP5 P2.6/P2MAP6 P2.7/P2MAP7 To Port Mapping P2IE.x P2IRQ.x P2IFG.x P2SEL.x Interrupt Edge P2IES.x Select Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 81: P2.2/P2Map2

    P2.7/P2MAP7 7 P2.7 (I/O) I: 0; O: 1 Mapped secondary digital function ≤ 19 (1) X = Don't care Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 82: Dvcc1

    1: High drive P3.3/TA1.2 P3.4/TA2CLK/SMCLK P3IN.x P3.5/TA2.0 P3.6/TA2.1 P3.7/TA2.2 Module X IN P3IE.x P3IRQ.x P3IFG.x P3SEL.x Interrupt Edge P3IES.x Select Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 83: Slas650D – June 2010 – Revised August

    Timer TA2.CCI1A capture input Timer TA2.1 output P3.7/TA2.2 7 P3.7 (I/O) I: 0; O: 1 Timer TA2.CCI2A capture input Timer TA2.2 output Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 84: Msp430F5632 Msp430F5631 Msp430F5630

    1: High drive P4.3/TB0.3 P4.4/TB0.4 P4IN.x P4.5/TB0.5 P4.6/TB0.6 P4.7/TB0OUTH/SVMOUT Module X IN P4IE.x P4IRQ.x P4IFG.x P4SEL.x Interrupt Edge P4IES.x Select Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 85: Msp430F5632 Msp430F5631 Msp430F5630

    I: 0; O: 1 SVMOUT Timer TB0.TB0OUTH SVMOUT (1) Setting TB0OUTH causes all Timer_B configured outputs to be set to high impedance. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 86: Msp430F5632 Msp430F5631 Msp430F5630

    (6) Setting the P5SEL.1 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying analog signals. The ADC12_A, VREF– reference is available at the pin. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 87: Msp430F5632 Msp430F5631 Msp430F5630

    P5.6/ADC12CLK/DMAE0 6 P5.6 (I/O) I: 0; O: 1 ADC12CLK DMAE0 P5.7/RTCCLK 7 P5.7 (I/O) I: 0; O: 1 RTCCLK Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 88: P6.4/Cb4/A4

    P6OUT.x P6.0/CB0/A0 P6DS.x P6.1/CB1/A1 P6SEL.x 0: Low drive P6.2/CB2/A2 1: High drive P6.3/CB3/A3 P6.4/CB4/A4 P6IN.x P6.5/CB5/A5 P6.6/CB6/A6/DAC0 P6.7/CB7/A7/DAC1 Keeper Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 89: P6.5/Cb5/A5

    (3) The ADC12_A channel Ax is connected internally to AV if not selected via the respective INCHx bits. (4) X = Don't care Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 90: Product Folder Links: Msp430F5638 Msp430F5637 Msp430F5636 Msp430F5635 Msp430F5634 Msp430F5633

    Port P7, P7.2, Input/Output With Schmitt Trigger Pad Logic To XT2 P7REN.2 P7DIR.2 P7OUT.2 P7.2/XT2IN P7DS.2 P7SEL.2 0: Low drive 1: High drive P7IN.2 Keeper Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 91: Msp430F5632 Msp430F5631 Msp430F5630

    (3) Setting P7SEL.2 causes the general-purpose I/O to be disabled in crystal mode. When using bypass mode, P7.3 can be used as general-purpose I/O. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 92: P7.4/Cb8/A12

    CBPD.x DAC12AMPx>0 DAC12OPS P7REN.x P7DIR.x P7.4/CB8/A12 P7DS.x P7.5/CB9/A13 P7SEL.x 0: Low drive P7.6/CB10/A14/DAC0 1: High drive P7.7/CB11/A15/DAC1 P7IN.x Keeper Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 93: P7.5/Cb9/A13

    (3) The ADC12_A channel Ax is connected internally to AV if not selected via the respective INCHx bits. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 94: Msp430F5632 Msp430F5631 Msp430F5630

    P8.6 (I/O) I: 0; O: 1 UCB1SOMI/UCB1SCL P8.7 P8.7 (I/O) I: 0; O: 1 (1) X = Don't care Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 95: Msp430F5632 Msp430F5631 Msp430F5630

    I: 0; O: 1 P9.6 6 P9.6 (I/O) I: 0; O: 1 P9.7 7 P9.7 (I/O) I: 0; O: 1 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 96: Msp430F5632 Msp430F5631 Msp430F5630

    Direction set by USB module Table 65. Port PUR Input Functions CONTROL BITS FUNCTION PUSEL PUREN Input disabled Pullup disabled Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 97: Msp430F5632 Msp430F5631 Msp430F5630

    Table 65. Port PUR Input Functions (continued) CONTROL BITS FUNCTION PUSEL PUREN Input disabled Pullup enabled Input enabled Pullup disabled Input enabled Pullup enabled Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 98: Dvcc1

    DVSS PJOUT.x From JTAG PJ.1/TDI/TCLK PJDS.x PJ.2/TMS From JTAG 0: Low drive PJ.3/TCK 1: High drive PJIN.x To JTAG Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 99: Slas650D – June 2010 – Revised August

    (3) The pin direction is controlled by the JTAG module. (4) In JTAG mode, pullups are activated automatically on TMS, TCK, and TDI/TCLK. PJREN.x are don't care. Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 100: Msp430F5632 Msp430F5631 Msp430F5630

    Temp. Sensor 85°C (1) NA = Not applicable Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 101: Msp430F5632 Msp430F5631 Msp430F5630

    USB Input Ports DP and DM, Corrected V and V limits. Flash Memory, Changed I and I limits. ERASE MERASE BANK Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: MSP430F5638 MSP430F5637 MSP430F5636 MSP430F5635 MSP430F5634 MSP430F5633 MSP430F5632 MSP430F5631 MSP430F5630...
  • Page 102 PACKAGE OPTION ADDENDUM www.ti.com 19-Jul-2013 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples Drawing (4/5) MSP430F5630IPZ ACTIVE LQFP Green (RoHS CU NIPDAU Level-3-260C-168 HR M430F5630 &...
  • Page 103 PACKAGE OPTION ADDENDUM www.ti.com 19-Jul-2013 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples Drawing (4/5) MSP430F5633IZQWR ACTIVE 2500 Green (RoHS SNAGCU Level-3-260C-168 HR M430F5633 MICROSTAR & no Sb/Br) JUNIOR MSP430F5633IZQWT ACTIVE...
  • Page 104 PACKAGE OPTION ADDENDUM www.ti.com 19-Jul-2013 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples Drawing (4/5) MSP430F5637IPZ ACTIVE LQFP Green (RoHS CU NIPDAU Level-3-260C-168 HR M430F5637 & no Sb/Br) MSP430F5637IPZR ACTIVE LQFP...
  • Page 105 PACKAGE OPTION ADDENDUM www.ti.com 19-Jul-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
  • Page 106 PACKAGE MATERIALS INFORMATION www.ti.com 16-Dec-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) MSP430F5630IZQWR BGA MI 2500 330.0 16.4 12.0 16.0 CROSTA R JUNI...
  • Page 107 PACKAGE MATERIALS INFORMATION www.ti.com 16-Dec-2013 Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) MSP430F5635IPZR LQFP 1000 330.0 24.4 17.0 17.0 20.0 24.0 MSP430F5635IZQWT BGA MI 330.0 16.4 12.0 16.0 CROSTA R JUNI...
  • Page 108 PACKAGE MATERIALS INFORMATION www.ti.com 16-Dec-2013 Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) JUNIOR MSP430F5632IZQWT BGA MICROSTAR 336.6 336.6 28.6 JUNIOR MSP430F5633IZQWR BGA MICROSTAR 2500 336.6 336.6 28.6 JUNIOR MSP430F5633IZQWT BGA MICROSTAR 336.6 336.6 28.6 JUNIOR MSP430F5635IPZR LQFP 1000...
  • Page 110 MECHANICAL DATA MTQF013A – OCTOBER 1994 – REVISED DECEMBER 1996 PZ (S-PQFP-G100) PLASTIC QUAD FLATPACK 0,27 0,50 0,08 0,17 0,13 NOM 12,00 TYP Gage Plane 14,20 13,80 0,25 16,20 0,05 MIN 0 – 7 15,80 1,45 0,75 1,35 0,45 Seating Plane 0,08 1,60 MAX 4040149 /B 11/96...
  • Page 111 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.

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