Sch04_Dig_Sub_Cpu - Denon AVR-X3000 Service Manual

Integrated network av receiver
Hide thumbs Also See for AVR-X3000:
Table of Contents

Advertisement

1
2
3
A
B
C
C0
Z2PLDAERR
Z2PLDAERR
PLDAERR
MPLDCLK
MPLDCLK
MPLDDATA
MPLDDATA
MPLDCSMAIN
MPLDCSMAIN
SUBTCK
SUBTCK
SUBTMS
SUBTMS
D
SUBTDI
SUBTDI
SUBTDO
SUBTDO
C1
E
DSP_ICS
DSP_ICS
DSP_FLAG0
DSP_FLAG0
DSP_RST
DSP_RST
DSPI_CLK
DSPI_CLK
DSP_MISO
DSP_MISO
DSP_MOSI
DSP_MOSI
DSP_ROMRST
DSP_ROMRST
F
C2
DIRDOUT
DIRDOUT
DIRDIN
DIRDIN
DIRCE
TXEN
DIRCE
SCPU
DIRCLK
DIRCLK
G
DIRRST1
DIRRST1
C3
DACRST
DACRST
DACMC
DACMC
DACMDI
DACMDI
DACMS
DACMS
DACMUTE
DACMUTE
H
SCPU
J
K
L
GND LINE
POWER+ LINE
POWER- LINE
ANALOG AUDIO
M
1
2
3
4
5
6
7
T242
T241
T240
R2325
DSP_MOSI
P13/TXD6
33
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
P12/RXD6
DSP_MISO
76
DSPI_CLK
R2326
33
P11/CLK6
77
R2386
R2338
4.7K
78
P10
R2327
33
SUBTDI
4.7K
79
P07
VIN_A
R2328
33
80
P06
VIN_B
R2382
33
81
P05
VIN_C
R2383
33
82
P04
R2329
33
SUBTCK
83
P03
COMP_SW1
R2385
33
84
P02
COMP_SW2
R2387
33
85
P01
IC231
DIRRST1
86
P00
DSP_RST
87
P107/(AN7)
R5F3650KNFB
R2330
4.7K
88
P106/(AN6)
DSP_ROMRST
89
P105/(AN5)
R2339
4.7K
90
P104/(AN4)
DSP_FLAG0
91
P103/(AN3)
DSP_ICS
92
P102/(AN2)
27.P71(N)/RXD2/SCLMM
R2331
4.7K
28.P70(N)/TXD2/SDAMM
93
P101/(AN1)
R2388
29.P67/TXD1
94
AVSS
4.7K
R2332
4.7K
95
98.P97/(SIN4)
P100/(AN0)
C2315
0.1
99.P96/(SOUT4)
96
VREF
100.P95/(CLK4)
C2316
0.1
97
AVCC
98
R2333
4.7K
99
R2334
4.7K
100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
R2366
33
DIRCE
R2304
DIRDIN
R2302
33
1M
DIRDOUT
R2367
33
R2303
33
DIRCLK
X2301
16MHz
TXC
R2305
4.7K
DIGITAL AUDIO
TMDS SIGNAL
ANALOG VIDEO
DIGITAL VIDEO
4
5
6
7
8
9
10
R2335
OPEN
R2337
OPEN
R2336
OPEN
R2340
4.7K
R2341
4.7K
R2342
4.7K
SCPU
DV_POWER1
CEC_POWER
56
55
54
53
52
51
P42
R2314
4.7K
50
P43
49
ADV8003_INT1
P44
48
ADV8003_INT2
P45/(CLK7)
47
R2370
4.7K
P46/(RXD7)/SCL7
46
R2371
4.7K
P47/(TXD7)/SDA7
45
P50/CE
44
P51
43
P52
42
R2313
4.7K
P53
41
P54
40
R2312
4.7K
P55/EPM
39
DV_POWER2
P56
38
P57
37
R2311
33
REQ_SOMI
P60/CTS0
36
R2310
33
CLK_MO
P61/CLK0
35
MOSI
P62/RXDO
34
R2309
33
SOMI
P63/TXDO
33
P64/CTS1
32
31
P65/CLK1/SCLK
R2372
33
P66/RXD1
30
R2373
33
29
R2374
33
28
R2375
33
27
26
P72/CLK2
DA_POWER
SCPURXD
SCPU
SCPUTXD
ACK_SIMO
STBY POWER
8
9
10
121
11
12
13
HDMI_A_SEL
HDMI CEC_PART
HINSELB
HINSELC
CEC_OUT
CEC_COM
1TMDSSWRST_RST
C2313
OPEN
R2345
Q2306
10K
INC2001AC1
HINSELA
R2348
HDMI_SDA
2.2M
HDMI_SCL
R2351
220K
Q2304
2SC3052
Q2305
2SC3052
CEC_IN
CN231
MP:open
CJP11GA193ZY
10022H-11C
SCLK
R2360
33
NC
NC
R2361
33
MPLDCSMAIN
CE
CNVSS
DGND
SCPURXD
SCPUTXD
SCPU3.3V
RST
Q2303
RT1N141C
Q2301
RT1P141C
Q2302
RT1N141C
SCHEMATIC DIAGRAMS (4/30)

SCH04_DIG_SUB_CPU

11
12
13
14
15
16
A
SCPU5V
DGND
B
SCPU3.3V
SUBBDOWN
SUBBDOWN
CEC_POWER
CEC_POWER
DV_POWER2
DV_POWER2
DV_POWER1
DV_POWER1
DA_POWER
DA_POWER
8A
C
D
E
VIN_A
VIN_A
VIN_B
VIN_B
VIN_C
VIN_C
COMP_SW1
COMP_SW1
COMP_SW2
COMP_SW2
2A
F
SCPURXD
SCPURXD
SCPUTXD
SCPUTXD
C4
G
H
CLK_MO
CLK_MO
MOSI
MOSI
ACK_SIMO
ACK_SIMO
SUB_RST
SUB_RST
REQ_SOMI
REQ_SOMI
SOMI
SOMI
SUB_UPDATE
PLDAERR
8B
J
K
L
M
14
15
16

Advertisement

Table of Contents
loading

Table of Contents