Silicon Laboratories C8051F970 User Manual page 13

5.15. Shorting Blocks: Factory Defaults
The C8051F970 target board comes from the factory with pre-installed shorting blocks on several headers.
Figure 6 shows the positions of the factory default shorting blocks.
By default, a shorting block is installed in the following locations:
 J1 (VREG Select): +3.3V connected to VREG
 J2 (VBAT Select): CR2032 connected to VBATT
 JP1: P0.1 connected to VCP_RX
 JP2: P0.2 connected to VCP_TX
 JP3: VDD connected to VDD_MCU
 JP4: VDD connected to VDD_LED
 JP5: P5.0 connected to Potentiometer
In addition, the VDD Select switch is in the OFF position by default.
Figure 6. Shorting Blocks: Factory Defaults
Rev. 0.1
C8051F970DK-UG
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