Linear Analog Devices DC2732A Demo Manual page 40

DEMO MANUAL DC2732A
APPENDIX B: CAN BASED EVALUATION
Table 6. CAN Message Send and Received by DC2732A_CAN for RAW LTC2949 Register Access
ID NAME
0x117 RAWRW
COUNTDOWN
Notes:
1. Page as MSB followed by 8-bit address is equivalent to a 9-Bit address value as defined in DC2732A_CAN.dbf and in the register constants in
LTC2949.h.
2. The number of register bytes Dx to be send in a RAWRW CAN message is defined by the CAN message data length – 2, as two bytes are always
reserved for WRITE, PAGE, COUNTDOWN and ADDR.
40
SIGNAL T,[BYTE],BITS
WRITE Bool, [0] (7)
UInt, [0], (6:1)
PAGE Bool, [0] (0)
ADDR Int, [1], 8
D0 Int, [2], 8
D1 Int, [3], 8
D2 Int, [4], 8
D3 Int, [5], 8
D4 Int, [6], 8
D5 Int, [7], 8
DESCRIPTION
Write flag. Set for write commands, clear for read commands. In the responding
message send by DC2732A_CAN this flag will be inverted (e.g., after a write send to
DC2732A_CAN the WRITE flag will be cleared in the response message)
Countdown tag for multi RAWRW CAN message bursts. For RAWRW messages with
up to 6 data bytes COUNTDOWN must be zero. If more than 6 bytes must be written
in a burst to LTC2949 COUNTDOWN must be decremented with every message till
zero for the last message. If the number of bytes is not a multiple of 6 bytes only
the first message of the multi RAWRW CAN message bursts may have less than
6 bytes. WRITE, PAGE and ADDR must be equal for all sub-messages of a burst. The
following table shows an example how to write a burst with 16 bytes (e.g., a full row in
LTC2949's register map).
MESSAGE COUNTDOWN
1 2
2 1
3 0
Messages send by DC2732A_CAN in response to a read command will make the same
usage of COUNTDOWN to pack more than 6 bytes into several CAN messages.
Register page flag. Set for page 1, clear for page 0.
Register address
Write: Data byte 0/Read: Length (number of bytes to be read)
Register byte 1
Register byte 2
Register byte 3
Register byte 4
Register byte 5
CAN DATA LENGTH DX SIGNALS
6 D0 – D1 (4)
8 D0 – D5 (6)
8 D0 – D5 (6)
Rev. 0