Synthesizer Block Diagram - Viking 242-2009-632 Service Manual

CIRCUIT DESCRIPTION
20
REF
in
OSC OR
4-STAGE
DIVIDER
1
REF
out
18
CLOCK
REGISTER
19 CONTROL
DATA IN
17
ENABLE
INPUT AMP
11
f
in
10
f
in
The programming of the counters in U205 is per-
formed by circuitry in the Main Processor Card
(MPC), buffered and latched through the Interface
Alarm Card (IAC) and fed in to the synthesizer on
J201, pin 20 to Data input port U205, pin 19.
Data is loaded into U205 serially on the Data
input port U205, pin 19 when U205, pin 17 is low.
Data is clocked into the shift registers a bit at a time
by a low to high transition on the Clock input port
U205, pin 18. The Clock pulses come from the MPC
via the IAC to J201, pin 19.
The counter divide numbers are chosen so the
TCXO-derived input to the phase detector (f
same frequency as the OCXO-derived input (f
f input is produced by dividing the 1.25 MHz OCXO
R
frequency by 125. This produces a reference fre-
quency (f ) of 10 kHz.
R
March 1999
Part No. 001-2009-600
13-STAGE R COUNTER
DOUBLE-BUFFERED
R REGISTER
16 BITS
SHIFT
C REGISTER
AND
8 BITS
LOGIC
STANDBY
LOGIC
A REGISTER
24 BITS
INTERNAL
CONTROL
6-STAGE
A COUNTER
64/65
PRESCALER
Figure 6-3 SYNTHESIZER BLOCK DIAGRAM
) is the
V
). The
R
DATA OUT
PORT
SELECT
f
R
LOGIC
f
V
f
R
f
V LOCK DETECT
AND CONTROL
f
R
PHASE/FREQUENCY
f
V
DETECTOR A
POR
AND CONTROL
f
R
PHASE/FREQUENCY
f
V
DETECTOR B
AND CONTROL
12-STAGE
N COUNTER
MODULUS
CONTROL
LOGIC
The f input is produced by dividing the TCXO
V
frequency using the prescaler and N counter in U205.
The prescaler divides by 64 or 65. The divide number
of the prescaler is controlled by the N and A counters
in U205.
Both the N and A counters begin counting down
from their programmed number. When the A counter
reaches zero, it halts until the N counter reaches zero.
Both counters then reset and the cycle repeats. The A
counter is always programmed with a smaller number
than the N counter. While the A counter is counting
down, the prescaler divides by 65. Then when the A
counter is halted, the prescaler divides by 64. As an
example: To produce the frequency of 10 kHz, the N
and A counters are programmed as follows:
N = 27 A = 22
6-4
16
OUTPUT A
2
LD
15
OUTPUT B
(OPEN-DRAIN OUTPUT)
8
Rx
6
PDout
3
OR (UP)
4
OV (DOWN)
13
TEST 2
9
TEST 1