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JVC FS-SD5 Schematic Diagrams page 19

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FS-SD5/FS-SD7/FS-SD9
UPD780024AGKA11 (IC701) : CPU for KSM-770ABA
1. Pin layout
64
1
16
17
2. Block diagram
1-18
~
49
48
33
~
32
16-bit TIMER/
EVENT COUNTER
8-bit TIMER/
EVENT COUNTER50
8-bit TIMER/
EVENT COUNTER51
WATCHDOG TIMER
WATCH TIMER
SERIAL
INTERFACE30
SERIAL
INTERFACE31
UART0
A/D CONVERTER
INTERRUPT
CONTROL
BUZZER OUTPUT
CLOCK OUTPUT
VDD0 VDD1 Vss0 Vss1 IC
CONTROL
ROM
78K/0
(32K
CPU
CORE
BYTE)
RAM
(1024
BYTE)
PORT0
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
EXTERNAL
ACCESS
SYSTEM
CONTROL

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