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Fastwel CPC307 Series User Manual

Pc/104-plus vortex86dx based cpu module
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CPC307
PC/104-Plus
Vortex86DX Based
CPU Module
User Manual
Rev. 4.1
October 2019

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Summary of Contents for Fastwel CPC307 Series

  • Page 1 CPC307 PC/104-Plus Vortex86DX Based CPU Module User Manual Rev. 4.1 October 2019...
  • Page 2 Product Title: CPC307 Document name: CPC307 User Manual Manual version: 006 Copyright © 2019 Fastwel Co. Ltd. All rights reserved. Revision Record Rev. Index Brief Description of Changes Date of Issue Initial preliminary version July 2010 BIOS Setup description added.

  • Page 3: Table Of Contents

    CPC307 Table of Contents Table of Contents ..............................1 List of Tables ................................3 List of Figures ................................4 Notation Conventions ............................... 5 General Safety Precautions ............................. 6 Unpacking, Inspection and Handling ........................7 Three Year Warranty ..............................8 Introduction .............................9 Module Introduction ............................
  • Page 4 CPC307 4.3.16 RTC, CMOS, FRAM, hardware reset and BIOS backup…………………………………………62 4.3.17 Connecting power supply to the module…………………………………………………………...71 Module’s supply voltage supervisor……………………………………………………….....72 4.3.18 4.3.19 GPIO ports…………………………………………………………………………………………….73 4.3.20 Configuration jumpers……………………………………………………………………………….76 4.3.21 LED indication……………………………………………………….………………………………..80 4.3.22 Features of the console redirect module…………………………………………………………..81 BIOS (Basic Input/Ouput System) ..................... 83 Main ................................

  • Page 5: List Of Tables

    CPC307 List of Tables Table 1.1: CPC307 Versions............................. 10 Table 1.2: CPC307 Supplied Set ............................11 Table 1.3: CPC307 Additional Accessories………......................11 Configurations……………………………………………………………………….……………………………………..12 Table 1.4: Table 2.1: Power Supply Requirements ..........................15 Weight of the module……………………………………………………………………….……………………………..16 Table 2.2: Allocation of the address space of the first megabyte of memory………………..…………………………………28 Table 4.1: I/O address space allocation……………………………………………………………….……………………………..28 Table 4.2:...

  • Page 6: List Of Figures

    CPC307 Description of the “ISA Configuration” menu (ISA Bus Setting)…………………………………………………103 Table 5.15: Table 5.16: Description of the "Serial/Parallel Port Configuration" menu……………………………………………………..104 Table 5.17: Description of the WatchDog Configuration menu…………………………………………………………………106 Description of the “GPIO and I2C Configuration” menu…………………………………………………………...107 Table 5.18: Table 5.19: Description of the "CAN and COM5,6 Configuration"...

  • Page 7: Notation Conventions

    This document contains information, which is property of Fastwel Co. Ltd. It is not allowed to reproduce it or transmit by any means, to translate the document or to convert it to any electronic form in full or in parts without antecedent written approval of Fastwel Co. Ltd. or one of its officially authorized agents.

  • Page 8: General Safety Precautions

    However, prolonged operation near the maximum temperature is not recommended by Fastwel or by electronic chip manufacturers due to thermal stress related failure mechanisms. These mechanisms are common to all silicon devices, they can reduce the MTBF of the product by increasing the failure probability.

  • Page 9: Unpacking, Inspection And Handling

    If damage is observed (usually in the form of bent component leads or loose socketed components), contact Fastwel's official distributor from which you have purchased the product for additional instructions. Depending on the severity of the damage, the product may even need to be returned to the factory for repair.

  • Page 10: Three Year Warranty

    In performing all necessary installation and application operations, please follow only the instructions supplied by the present manual. In order to keep Fastwel’s warranty, you must not change or modify this product in any way, other than specifically approved by Fastwel or described in this manual.

  • Page 11: Introduction

    Fastwel CPC307 is designed for applications requiring high-performance low-power industrial controller with CAN interface. Fastwel СPС307 conforms to PC/104-Plus specification (except CPC307-01) and is compatible with a large number of peripheral and power supply modules delivered by a wide range of manufacturers.

  • Page 12: Cpc307 Versions

    CPC307 CPC307 Versions At the present time the CPC307 module is manufactured in several versions differing in interface capabilities. Table 1.1: CPC307 Versions Name Conventional notation Ordering name Description Vortex86DX (600 MHz), 256 MB HDD, flash-drive 1 GB – for the module’s versions CPC307-02 up to the 4.x;...

  • Page 13: Delivery Checklist

    CPC307 Delivery Checklist Table 1.2: CPC307 Supplied Set Name Description Amount CPC307 CPC307 Processor Module 1 pcs. Installation kit that includes: 1 pcs. ACS00023 DB9F to IDC2-10 2 mm adapter cable for connection to COM port 1 pcs. (685611.082) – М3 nut DIN934 4 pcs.

  • Page 14: Table 1.4: Configurations

    CPC307 Name Description ACS00043-01 PS/2 cable. Recommended counterpart for XP23 header of the module ACS00051 Cable for connection of two standard USB devices to XP12 (LPT/USB) connector The table 1.3 below shows the list of additional accessories for СPС307 module, which are not included in the standard delivery checklist and can be ordered separately.

  • Page 15: Technical Specifications

    CPC307 Technical Specifications General  Form-factor:  PC/104-Plus  CPU: Integrated in DM&P Vortex86DX SoC  600 MHz  32-bit x86 compatible core  16-bit memory bus  Math coprocessor  32 KB L1, 256 KB L2 cache  6-stage pipeline ...
  • Page 16 CPC307  COM3, COM4: RS-232, up to 115,2 Kbaud, full;  COM5, COM6: RS-422/485, up to 3,6 Mbaud, channel-by-channel isolation, isolation voltage of no less than 500 V;  Console I/O via serial port (COM1 – COM4);  Two CAN 2.0b interfaces, SJA1000T controller, data transfer rate up to 1 Mb/sec, channel-by-channel isolation, isolation voltage of no less than 500 V;...

  • Page 17: Power Requirements

    CPC307 Power Requirements The power supply of the module should comply with the requirements given in Table. 2.1. The module is powered via the PC/104 and PC/104-plus (if installed) connectors. Additionally, power can be supplied via XP22 (4-contact AMP 4-171826-4) power connector by an external DC power source.

  • Page 18: Dimensions And Weight

    CPC307 Dimensions and Weight Weight of the module should not exceed the value specified in the table below: Table 2.2: Weight of the module Version Net Weight in kg, no more than Gross Weight in kg, no more than CPC307-02 0.125 0.265 CPC307-03...

  • Page 19: Figure 2.1: A) Dimensions Of Versions And Location Of Сpс307 Components (This Figure Is Relevant For The Versions 3.Х)

    CPC307 Fig. 2.1 a) Dimensions of versions and location of СPС307 components (this figure is relevant for the versions 3.х) © 2 0 1 9 F a s t w e l C P C 3 0 7 U s e r M a n u a l v .

  • Page 20: Mtbf

    CPC307 Fig. 2.2 b) Dimensions and location of СPС307 components (this figure is relevant for versions 4.х) MTBF  MTBF for CPC307 is 200000 hours. The value is calculated according to: Telcordia Issue 1 model, Method I Case 3, for continuous operation at a ...

  • Page 21: Intended Use Of The Device

    CPC307 3. Intended Use of the Device A diagram that describes connection of the required devices to the module is shown in Figure 3.1. MicroSD Socket Fig. 3.1. Connection of external devices to CPC307 The necessary devices to enable the module and check its performance are: –...

  • Page 22: Functional Description

    CPC307 4. Functional Description Structure and Layout Functional diagram of the CPC307 module is shown in Figure 4.1. Figure 4.1: CPC307 Block Diagram © 2 0 1 9 F a s t w e l C P C 3 0 7 U s e r M a n u a l v .

  • Page 23: Address Space Allocation

    CPC307 CPC307 includes the following main functional units: SoC Vortex86DX 256 MB soldered DDR2 SDRAM system memory; IDE port with support for up to two UltraDMA/100 devices; SD controller (merged with the IDE port); Flash-disk (merged with the IDE port); PS/2 keyboard / mouse port;...

  • Page 24: Figure 4.2: (A) Location Of Connectors And Main Components On The Top Side And Bottom Side For Versions Cpc307-02, Cpc307-05 (Relevant For Cpc307 V. 3.(X)

    CPC307 Fig. 4.2 (a) location of connectors and main components on the TOP side and BOTTOM side for versions CPC307-02, CPC307-05 (relevant for CPC307 V. 3.(x). © 2 0 1 9 F a s t w e l C P C 3 0 7 U s e r M a n u a l v .

  • Page 25: Figure 4.3: B) Location Of Connectors And Main Components On The Top And Bottom Sides For The Cpc307-02 And Cpc307- 05 Versions (Relevant For Cpc307 V. 4.X)

    CPC307 Fig. 4.3 b) location of connectors and main components on the TOP and BOTTOM sides for the CPC307-02 and CPC307-05 versions (relevant for CPC307 V. 4.x) © 2 0 1 9 F a s t w e l C P C 3 0 7 U s e r M a n u a l v .

  • Page 26: Figure 4.4: A) Location Of Connectors And Main Components On The Top Side And Bottom Side For Cpc307-03 (Relevant For Cpc307 V. 3.X)

    CPC307 Fig. 4.4 a) location of connectors and main components on the TOP side and BOTTOM side for CPC307-03 (relevant for CPC307 V. 3.x) © 2 0 1 9 F a s t w e l C P C 3 0 7 U s e r M a n u a l v .

  • Page 27: Figure 4.5: B) Location Of Connectors And Main Components On The Top And Bottom Sides For Cpc307-03 (Relevant For Cpc307 V. 4.X)

    CPC307 Fig. 4.5 b) location of connectors and main components on the TOP and BOTTOM sides for CPC307-03 (relevant for CPC307 V. 4.x) © 2 0 1 9 F a s t w e l C P C 3 0 7 U s e r M a n u a l v .

  • Page 28: Figure 4.6: A) Location Of Connectors And Main Components On The Top Side And Bottom Side For Cpc307-04 (Relevant For Cpc307 V. 3.X)

    CPC307 Fig. 4.6 a) location of connectors and main components on the TOP side and BOTTOM side for CPC307-04 (relevant for CPC307 V. 3.x) © 2 0 1 9 F a s t w e l C P C 3 0 7 U s e r M a n u a l v .

  • Page 29: Figure 4.7: B) Location Of Connectors And Main Components On Top And Bottom Sides For The Cpc307-04 Version (Relevant For Cpc307 V. 4.X)

    CPC307 Fig. 4.7 b) location of connectors and main components on TOP and BOTTOM sides for the CPC307-04 version (relevant for CPC307 V. 4.x) © 2 0 1 9 F a s t w e l C P C 3 0 7 U s e r M a n u a l v .

  • Page 30: Allocation Of Memory Address Space

    CPC307 4.2 Address space allocation 4.2.1 Allocation of memory address space Table 4.1. Allocation of the address space of the first megabyte of memory Address range Size Description 00000h – 9FFFFh 640 KB A0000h – BFFFFh 128 KB PCI/ISA VGA Graphics C0000h –...

  • Page 31: Table 4.3: Structure Of Gpcs0, Gpcs1 Registers

    CPC307 Table 4.3. Structure of GPCS0, GPCS1 registers Name Attribute Description Chip Select 0 Base Address Register 31-1 Base address, [31-0] for the memory address range, [15-1] for the I/O address range Address decoding authorization Chip Select 0 Base Address Mask 31-28 Reserved Reserved...

  • Page 32: Table 4.4: Preset Address Values For Can1 And Can2 Interfaces

    CPC307 4.2.3.1 Address space of CAN1, CAN2 ports The range of memory addresses for access to CAN controllers can be assigned arbitrarily in the least- significant megabyte memory area. The addresses of the controllers should be positioned sequentially one after another - first CAN1, then CAN2. Each controller is assigned with a 256-byte memory space to address the controller registers, and the next 256 bytes are the controller reset memory space.

  • Page 33: Allocation Of Interrupt Lines

    CPC307 4.2.3.2 Address space of COM5, COM6 ports The range of memory addresses for accessing COM5 and COM6 serial ports can be assigned arbitrarily in the I/O ports area. The addresses should be positioned sequentially one after another -first COM5, then COM6. Each port is assigned with 8 bytes of I/O address space.

  • Page 34: Table 4.6: Allocation Of Interrupt Lines In Сpс307

    CPC307 Table 4.6. Allocation of interrupt lines in СPС307. Notational conventions used in the Table 4.6: Switching is not allowed ○ Switching is allowed ● Switching is set by default Switching is carried out via IOCHK# signal of ISA bus. ©...

  • Page 35: Allocation Of Channels For Direct Access To Memory

    CPC307 4.2.5 Allocation of channels for direct access to memory Table 4.7. Allocation of channels for direct access to memory Notational conventions used in the Table 4.7: Switching is not allowed ○ Switching is allowed ● Switching is set by default ©...

  • Page 36: Description Of The Main Functional Elements Of The Module

    CPC307 4.3 Description of the main functional elements of the module 4.3.1 Vortex86DX System-on-Chip DM&P SoC Vortex86DX series includes: - 32-bit x86 processor core operating at 600 MHz; - L1 cache memory 32 Kbytes; - L2 cache memory 256 KB; - Math coprocessor;...

  • Page 37: Ddr2 Memory

    CPC307 4.3.2 DDR2 Memory The module has two DDR2 SDRAM chips installed (soldered) on it with a total volume of 256 MB, operating at a frequency of 266 MHz (for module’s versions up to 4.x) or 333 MHz (for module’s versions 4.x). No memory expansion modules can be installed.

  • Page 38: Table 4.9: The Purpose Of The Xp13 Contacts For Connecting Ide Devices

    CPC307 Attention! When connecting Compact Flash modules to an IDE (XP13) port using IDE-Compact Flash adapters, only the use of Compact Flash modules that support UDMA-5 or higher is allowed. The use of other Compact Flash cards may cause CPC307 to fail (built-in Flash Disk) and will not be a warranty case (due to different voltage levels on the IDE signal lines for different Compact Flash modules).

  • Page 39: Microsd

    CPC307 Table 4.10.Table of recommended configurations of IDE devices – to determine the NAND-flash drive located on the board, after the power is turned on, it is necessary to RESET the module (SW1 or the corresponding key combination on the keyboard). DVD drive should be connected strictly to the far end of the IDE cable 2 –...

  • Page 40: Ata Flash Disk Controller

    CPC307 Table 4.11. Purpose of XS3 and XS4 connectors contacts for microSD card connection Contact Signal Contact Signal DAT2 CD/DAT3 DAT0 DAT1 VCC (+3.3V) CDSwA CDSwB (GND) Fig. 4.10. Numbering contacts of microSD memory card 4.3.5 ATA Flash disk controller The module has a NAND Flash memory controller chip (ATA Flash disk controller), which is connected to the Primary IDE interface.

  • Page 41: Optoisolated Reset/Interrupt

    CPC307 Table. 4.12. Purpose of XP23 connector contacts for connection of PS/2 keyboard and mouse Contact Signal Contact Signal KBD CLK KBD DATA +5 V MOUSE CLK MOUSE DATA Fig. 4.11. Numbering XP23 connector contacts 4.3.7 Optoisolated reset/interrupt The module has a XP19 connector, which can be used to generate an optoisolated remote reset or interrupt signal, depending on setting the jumpers on the XP25 connector.

  • Page 42: Usb Interface

    CPC307 Fig. 4.12. Diagram of choosing the source of reset and switching the optoisolated input The external reset/interrupt circuit is connected to XP19. The location of the first pin of this connector on the module is shown in Fig. 4.13. The module has a JST B 2B-PH-KL connector.

  • Page 43: Ethernet Port

    CPC307 Table 4.13. Purpose of XP12 connector contacts for the connection of USB devices Contact Signal Contact Signal +5 V (USB1) +5 V (USB2) GND (USB1) GND (USB2) – – +5 V (USB3) +5 V (USB4) GND (USB3) GND (USB4) Fig.

  • Page 44: Serial Ports

    CPC307 Table 4.14. Purpose of contacts of XP9 connector of Ethernet port Contact Signal Contact Signal TX1+ (Ethernet1) TX1- (Ethernet1) RX1+ (Ethernet1) RX1- (Ethernet1) – – – – – – Fig. 4.15. Numbering contacts of XP9 connector 4.3.10 Serial ports 4.3.10.1 COM1 and COM2 COM1 and COM2 ports operate in RS-232 or RS-485/422 interface mode and have standard PC/AT base addresses.

  • Page 45: Figure 4.16: Pin Assignment Of Xp18 Connector (For Module Versions 3.X And Below)

    CPC307 For COM2 port, RS-422/485 mode is set by assigning the line 2 of the GPIO2 port to "0" and setting line operation direction to "output" mode. For COM1 port, the Half-Duplex mode is set by assigning the GPIO2 port line 1 to "1". The Full-Duplex mode is set by assigning the line 1 of the GPIO2 port to "0".

  • Page 46: Figure 4.17: A) Rs-422/485 Transmitter With Offset Elements And Terminating Resistors (For The Module's Versions 3.X And Below)

    CPC307 Fig. 4.17. a) RS-422/485 Transmitter with offset elements and terminating resistors (for the module’s versions 3.x and below) In module versions 4.x and below: By installing XP18 jumpers, connection of matching circuits to signal lines of RS-422 or RS-485 interfaces is carried out and the operation mode is set.

  • Page 47: Figure 4.17: B) Rs-422/485 Transmitter With Offset Elements And Terminating Resistors (For Module's Versions 4.X)

    CPC307 Fig. 4.17. b) RS-422/485 Transmitter with offset elements and terminating resistors (for module’s versions 4.x) XP 18 – connection of matching resistors for COM1, COM2 ports in the RS - 422/485 modes Activation of the Rtt Lines TX-/TX+ (COM2) Activation of the Rtt Lines TX-/TX+ (COM1) Activation of the Rtr Lines RX-/RX+ (COM2) Activation of the Rtt Lines TX-/TX+ (COM2)

  • Page 48: Table 4.15: Purpose Of The Xp10 Connector Contacts For Com1 Port

    CPC307 voltage outputs are protected by a 0.5 A safety fuse. For external modules to be connected, the recommended current consumption is not more than 0.4 A. Connecting the power from the interface connectors to more than one external module is not recommended, since it could overload the power circuits of the CPU module.

  • Page 49: Figure 4.19: Combining Several Devices Via Rs-422 Interface

    CPC307 Fig. 4.19. Combining several devices via RS-422 interface Fig. 4.20. Combining several devices via RS-485 interface 4.3.10.2 COM3 and COM4 The COM3 and COM4 ports operate as a 9-wire RS-232 interface and have standard PC/AT base addresses. The base addresses and interrupt lines for serial ports are selected in the BIOS Setup menu. The maximum data rate for COM3 and COM4 ports is 115.2 KBaud.

  • Page 50: Table 4.17: Purpose Of The Xp6 Connector Contacts For Com3 Port

    CPC307 Attention! The +5 V power supply voltage circuit combines the similar contacts of the XS1 (PCI-104), XS2 (PC-104) and XP22 (additional power connector) connectors and is designed to power the module. The +5 V power supply voltage outputs are protected by a 0.5 A safety fuse. For external modules to be connected, the recommended current consumption is not more than 0.4 A.

  • Page 51: Figure 4.22: A) Purpose Of The Xp15 And Xp20 Connector Contacts (For Module Versions Up To 4.X)

    CPC307 The maximum data transfer rate for COM5 and COM6 ports is 3.6 MBaud. The ports are fully software compatible with the UART 16550. Control of transmitters in RS-422/485 mode is carried out by hardware. The maximum number of modules connected to the RS-485 network together with the CPC307 module is 128, if the input impedance of the RS-485 drivers is not less than 96 Ohms.

  • Page 52: Figure 4.22: B) Purpose Of Xp15 And Xp20 Connectors Contacts (For Module's Version 4.X)

    CPC307 XP15 – connection of matching/bias resistors for COM5 port, XP20 – connection of matching/bias resistors for COM6 port. Activation of Rtr for the RX-/RX+ lines (COM6) Activation of 680 Ohm GND bias resistor (COM6) Activation of 680 Ohm VCC bias resistor (COM6) Activation of Rtt for the TX-/TX+ lines (COM6) Activation of Rtr for the RX-/RX+ lines (COM5) Activation of 680 Ohm GND bias resistor (COM5)

  • Page 53: Table 4.20: Purpose Of The Xp17 Connector Contacts For The Com5 And Com6 Ports

    CPC307 Fig. 4.23. b) Transmitter with protective bias elements and terminating resistors (for module versions 4.x) Interfaces are routed to the XP17 connector (IDC2-10, double row pin connector with a 2 mm pitch). Purpose of the XP17 connector contacts is shown in Table. 4.20. The module is equipped with a Leotronics 2073-3102 connector.

  • Page 54: Parallel Printer Port (Lpt)

    CPC307 4.3.11 Parallel printer port (LPT) The LPT1 parallel port operates in SPP, EPP, ECP mode and has base addresses standard for PC/AT. The base address and interrupt line for the LPT1 port are selected in the BIOS Setup menu. The interface is routed to the XP12 connector part (IDC2-20, double row pin connector with a 2 mm pitch).

  • Page 55: Pc/104-Plus Connectors

    CPC307 4.3.12 PC/104-plus connectors Four expansion cards with PC/104-plus interface (PCI bus, 32 bit, 33 MHz, +3.3V) can be connected to the module. Up to 3x PCI-master devices are supported on the PC/104-plus bus. The interface is routed to the XS1 connector (PCI-104 connector, 120 pins, 2 mm pitch). The purpose of the XS1 connector contacts and the default load capacity of the PCI bus circuits are shown in Table.
  • Page 56 CPC307 Load- Load- Contact Signal State carrying Contact Signal State carrying capacity, capacity, Power supply – +5 V Input/Output Power supply – Input/Output +5 V Input/Output Input/Output Power supply – Input/Output Power supply – Input/Output – – AD10 Input/Output M66EN (GND) Power supply –...

  • Page 57: Pc/104 Connector

    CPC307 4.3.13 PC/104 Connector Additional expansion cards with PC/104 interface (ISA bus, 8/16 bit, 8.3/16.6 MHz, DMA support) can be connected to the module. Master mode is not supported on the PC/104 bus. The interface is routed to the XS2 connector (PC-104 Connector, 104 contacts, 2.54 mm pitch). The purpose of the XS2 connector pins and the default load capacity of the ISA bus circuits are shown in Table.

  • Page 58: Table 4.23: Purpose Of Xs2 Connector Contacts

    CPC307 Table 4.23. Purpose of XS2 connector contacts Load- Load- Contact Signal State carrying Contact Signal State carrying capacity, capacity, – – IOCHK# Input GND Power supply SD7 Input/Output RESET Output – SD6 Input/Output +5 V Power supply – SD5 Input/Output IRQ9 Input –...

  • Page 59: Figure 4.27: Numbering The Xs2 Connector Contacts: A) Top View Of The Module; B) Bottom View Of The Module With The Organizer Installed On The Connector

    CPC307 Load- Load- Contact Signal State carrying Contact Signal State carrying capacity, capacity, Power supply – Power supply – SBHE# Output MEMCS16# Input LA23 Output IOCS16# Input – LA22 Output IRQ10 Input – LA21 Output IRQ11 Input – LA20 Output IRQ12 Input –...

  • Page 60: Can-Interfaces

    CPC307 4.3.14 CAN-interfaces The CPC307 module has two SJA1000T controller chips compatible with the CAN 2.0 b interface specification and supports two independent CAN interface ports. There is a possibility of additional software reset of CAN controllers of each interface. Selection of the base address (BA) for serial ports is made by programming SNK Vortex86DX registers.

  • Page 61: Table 4.25: Purpose Of Xp5 Connector Pins For Can1 And Can2 Ports

    CPC307 Fig. 4.28.b) Purpose of XP4 and XP8 connectors’ pins for 4.х module versions Table 4.25. Purpose of XP5 connector pins for CAN1 and CAN2 ports Signal Signal CANH (CAN1) CANL (CAN1) GND_CAN1 CANH (CAN2) CANL (CAN2) GND_CAN2 Fig. 4.29. Numbering of XP5 connector pins Fig.

  • Page 62: Wdt Watchdog Timers

    CPC307 4.3.15 WDT Watchdog timers The module uses three WDT watchdog timers. The first two timers with a programmable response interval of 30.5 µs - 512 s (WDT0, WDT1) are integrated into the SoC Vortex86DX chip. The timers are controlled via internal processor registers (paragraph 4.3.15.1 WDT0, WDT1 watchdog timers).

  • Page 63: Table 4.27: Description Of The Wdt1 Watchdog Control Registers

    CPC307 Reserved Register 0 of WDT0 timer (value after reset 00h) Address register Bits [7:0] of WDT0 timer, resolution – 30.5 µs (22h) = 39h Register 1 of WDT0 timer (value after reset 00h) Address register Bits [15:8] of WDT0 timer, resolution – 30.5 µs (22h) = 3Ah Register 2 of WDT0 timer (value after reset 20h) Address register...

  • Page 64: Rtc, Cmos, Fram, Hardware Reset And Bios Backup

    CPC307 Reserved Register 0 of WDT1 timer (value after reset 00h) Bits [7:0] of WDT1 timer, resolution – 30.5 µs Register 1 of WDT1 timer (value after reset 00h) Bits [15:8] of WDT1 timer, resolution – 30.5 µs Register 2 of WDT1 timer (value after reset 00h) Bits [23:16] of WDT1 timer, resolution –...
  • Page 65 The CMOS_RST utility located in the folder ... \CPC306\Software\UTILS and can be found at Fastwel FTP. If the current CMOS settings do not ensure the normal operation of the module during its work and you cannot enter the BIOS setup menu to change the settings, you should switch the setting parameters to the "default"...
  • Page 66 The user can address FRAM memory directly through the SPI interface registers. For more information, refer to the description of the Vortex86DX processor (A9121) and FRAM memory that can be found at Fastwel FTP in the folder: ...\CPC307\TechInfo. An example of such work with FRAM memory is also located at Fastwel FTP and can be found at: ...\CPC307\Software\Example\SFRAM307.zip.
  • Page 67 CPC307 wMac -1,-1,-1 ; MAC-address of the integrated Ethernet controller wCheck ; Checksum of the array bUser db ; Beginning of the user area _FRAM ENDS ---------------------------------------------------------- Obtaining the module’s serial number. Input: AL = 6 AX = result code (0 – no error) CX:DX = serial number. Output: ----------------------------------------------------------- -----------------------------------------------------------...
  • Page 68 CPC307 ----------------------------------------------------------- Reading the user data from FRAM. Input: AL = 0Ch BX = data start address in FRAM user area CX = number of bytes read DS:DX = pointer to reading buffer Output: AX = result code (0 - no error, -2 (0FFFEh) - parameter error, wrong address) BX = maximum allowed address (user area size - 1) CX = number of bytes actually read The function reads the specified bytes of the FRAM user area into the buffer of the calling program.
  • Page 69 To update the main BIOS copy, you should perfrom the following actions: 4.3.16.4.1.1 Turn on the CPC307 module and in a standard mode from the main BIOS copy. Copy the folder VXDXBIOS (…\CPC307\Software\UTILS) from the relevnt Fastwel’s 4.3.16.4.1.2 FTP server to the module’s boot drive.
  • Page 70 Updating the BIOS backup copy is not allowed if the module is not booted from the main BIOS copy. 3. Copy the SPIFLASH folder (...\CPC307\Software\UTILS) from Fastwel FTP server. You should place the updated BIOS image (for example, the c307v310.bin file) into the copied folder.
  • Page 71 CPC307 After the module is rebooted, the optimal (factory) BIOS Setup settings can be loaded. If necessary, enter the BIOS Setup, change the required parameters, save and exit (paragraph 5.7 Exit). 6. Run the BIOS backup copy update utility from the SPIFLASH folder with the "u" key and specify the updated BIOS image: C:\SPIFLASH\spiflash.exe u c307v311.bin If the update is successful, the program displays the following messages:...
  • Page 72 BIOS update procedure. To update the main BIOS copy, follow these steps: 1. Copy the SPIFLASH folder (...\CPC307\Software\UTILS) from Fastwel FTP server to module’s boot drive. Place the updated BIOS image (for example, the c307v310.bin file) into the copied folder.

  • Page 73: Connecting Power Supply To The Module

    CPC307 If the update is successful, the program displays the following messages: SPIFLASH 1.11 (May 21 2008) (C) Copyright 2007 DMP Electronics Inc. CPU name = Vortex86DX SPI base address = fc00 send RDID cmd Device ID=c2 20 15 Flash type = MX25L1605, ok Update flash rom data from c307v311.bin: ADDR : 40000/40000 189 blank data block(s) skipped...

  • Page 74: Module's Supply Voltage Supervisor

    CPC307 When a PC/104 or PC/104-plus power supply source is installed, the supply voltage is fed to the module through the expansion connector contacts. When the module is used in standalone mode or used without a power supply source in the PC/104 stack, the supply voltage to the module can be fed through an additional XP22 power connector (angled, single-row 4-pin connector, 2.5 mm pitch).

  • Page 75: Gpio Ports

    CPC307 Fig. 4.32. Diagram of module’s power supply voltage supervisor 4.3.19 GPIO ports The Vortex86DX SoC is equipped with 3 I/O ports - GPIO (General Purpose Input Output), available to the user through the internal registers of the chip. Each port has 8x I/O lines, each of which can be configured as an input or as an output by programming the registers of the corresponding port.

  • Page 76: Table 4.29: Description Of Gpio Ports

    CPC307 Table 4.29. Description of GPIO ports Port 0 Port 1 Port 2 (GPIO0) (GPIO1) (GPIO2) Description Data register 0: Line is input Direction register 1: Line is output Table 4.30. Description of GPIO ports Line of I/O port Direction of I/O line Description GPIO00 –...

  • Page 77: Table 4.31: Purpose Of Xp14 Connector Contacts For Gpio0 Port

    CPC307 Line of I/O port Direction of I/O line Description Control of HL1 LED. 0 – Off, GPIO2[4] Output 1 – On Control of HL2 LED. 0 – Off, GPIO2[5] Output 1 – On Switch state of the 1 unit of SA1 switches. 0 –...

  • Page 78: Configuration Jumpers

    CPC307 Fig. 4.33. Numbering the XP14 conenctor contacts 4.3.20 Configuration jumpers Table 4.32. Description of jumpers installation to the XP4 connector Jumper location Function When the jumper is installed, the high-speed mode of the CAN1 interface driver is activated (for the rates greater than 250 Kbit/s). 1 - 2 When the jumper is removed, the CAN1 interface driver operates in a mode with a reduced level of emitted electromagnetic interference due to the lower...

  • Page 79: Table 4.35: Description Of Jumper Installation On Xp15 Connector For Module Versions 4.X

    CPC307 Table 4.35. Description of jumper installation on XP15 connector for module versions 4.x Jumper location Function The +TX signal through a 680 Ohm resistor is pulled up to a +5V power supply 1 - 2 voltage to generate a 200 mV offset on the Y/Z lines The-TX signal through a 680 Ohm resistor is pulled to the ground GND to 3 - 4 generate a 200 mV offset on the Y/Z lines...

  • Page 80: Table 4.39: Description Of Jumper Installation On Xp20 Connector For Module Versions 4.X

    CPC307 Table 4.39 Description of jumper installation on XP20 connector for module versions 4.x Jumper location Function 1 – 2 The +TX signal through a 680 Ohm resistor is pulled up to a +5V power supply voltage to generate a 200 mV offset on the Y/Z lines 3 –...

  • Page 81: Table 4.43: Description Of Installing The Jumpers On The Xp26 Connector

    CPC307 Table 4.43. Description of installing the jumpers on the XP26 connector Jumper location Function For module versions up to 4.x: When the jumper is installed, the external watchdog timer in the ADM706T power supply supervisor chip is turned off. When the jumper is removed, the operation of the external watchdog timer in the ADM706T power supply supervisor chip is allowed.

  • Page 82: Led Indication

    CPC307 4.3.21 LED indication The module has 3 LEDs (HL1 – HL2). The purpose of the module’s LEDs is shown in Table 4.45. Table 4.45. Purpose of the LEDs on the module Color Function Yellow Indication of +5 V supply voltage Green User LED.

  • Page 83: Features Of The Console Redirect Module

    CPC307 4.3.22 Features of the console redirect module The BIOS includes a console redirect module designed to work with the board in terminal mode. To continue the module’s operation after loading the OS, you should enable the BIOS Setup option "Redirection After BIOS →...
  • Page 84 CPC307 • Int 0x10, AH=0x10 - Set/Get Palette Registers. • Int 0x10, AH=0x11 - Character Generator Routine. • Int 0x10, AH=0x12 - Video Subsystem Configuration. © 2 0 1 9 F a s t w e l C P C 3 0 7 U s e r M a n u a l v .

  • Page 85: Bios (Basic Input/Ouput System)

    CPC307 5. BIOS (Basic Input/Ouput System) To enter the BIOS Setup, you should press the "DEL" key on the keyboard or the "F4" key on the console PC keyboard (when the "Console Redirect"option is enabled) during the POST (Power On Self Test) procedure.

  • Page 86: Main

    CPC307 5.1 Main This tab contains description of the BIOS version, processor and RAM installed. There are also two items responsible for setting the current time and date. The Main menu screen is shown in Fig. 5. 2, the description of the items is given in Table 5.1.

  • Page 87: Advanced (Additional Settings)

    CPC307 5.2 Advanced (Additional Settings) This tab contains items responsible for the operation of the soldered ATA Flash Disk controller, processor cache, IDE bus, console I/O and USB devices. The "Advanced" menu screen is shown in Fig. 5.3, the items are described in Table 5.2 Fig.

  • Page 88: Table 5.3: Description Of The "Cpu Configuration" Menu

    CPC307 Notes: 1) The modules of 3.x versions have no "Embedded NAND Flash" function; 2) CPC307-04 has no “Embedded NAND Flash” function. 5.2.1 CPU Configuration Screen of the “CPU Configuration” menu is shown in Fig. 5.4, description of the items is specified in Table 5.3. Fig.

  • Page 89: Table 5.4: Description Of The Ide Configuration Menu

    CPC307 Fig. 5.5. Screen of the IDE Configuration menu Table 5.4. Description of the IDE Configuration menu Menu item Purpose Onboard PCI IDE Control of the operation of the integrated IDE bus controller. Controller [Primary] Operation is allowed [Disabled] Operation is prohibited Onboard IDE Operate Control of the operation of the integrated IDE bus controller.

  • Page 90: Table 5.5 Description Of The "Primary Ide Master" Menu

    CPC307 Menu item Purpose ATA(PI) 80Pin Cable Selecting a method for detection of 80-core ATA(PI) cable Detection [Host & Device] Checking on the part of the system and IDE device [Host] Checking only on the part of the system [Device] Checking on the part of the IDE device only.
  • Page 91 CPC307 Menu item Purpose Transfer) [Auto] This option enables BIOS to automatically determine whether the Multi- Sector Transfers mode is supported on the current channel.This option enables BIOS to automatically determine the number of sectors per block for transferring from the hard drive to memory. The data to/from the device will be transferred several sectors per unit time.

  • Page 92: Table 5.6: Description Of The Remote Access Configuration (Console I/O Configuration) Menu

    CPC307 Menu item Purpose [Enabled] This option enables the use of 32-bit data transfer for the connected device [Disabled] This option disables the use of 32-bit data transfer for the connected device 5.2.3 Remote Access Configuration (Console I/O Configuration) The scren of the "Remote Access Configuration" menu s shown in Fig. 5.7, the description of the items is given in Table.
  • Page 93 CPC307 Menu item Purpose Serial port mode Operation mode of the console I/O mode [115200 8,n,1], Baud rate 115.2 Kbaud, 8-bit, no parity, 1 stop bit [57600 8,n,1], Baud rate 57.6 KBaud, 8-bit, no parity, 1 stop bit [38400 8,n,1], Baud rate 38.4 Kbaud, 8-bit, no parity, 1 stop bit [19200 8,n,1], Baud rate 19.2 KBaud, 8-bit, no parity, 1 stop bit...

  • Page 94: Table 5.7 Description Of The "Usb Configuration" Menu

    CPC307 5.2.4 USB Configuration The screen of the "USB Configuration" menu is shown in Fig. 5.8, the description of menu items is given in Table. 5.7. Fig. 5.8. Screen of the “USB Configuration» menu Table 5.7 Description of the “USB Configuration” menu Menu item Purpose Legacy USB Support...

  • Page 95: Table 5.8: Description Of The "Usb Mass Storage Device Configuration" Menu (Configuration Of Usb Ports)

    CPC307 5.2.5 USB Mass Storage Device Configuration Screen of the “USB Mass Storage Configuration” mode is shown in Fig. 5.9, description of menu items is given in Table 5.8. Fig. 5.9. Screen of the “USB Mass Storage Device Configuration” menu Table 5.8.

  • Page 96: Pcipnp (Additional Pci Plug And Play Configuration)

    CPC307 PCIPNP (Additional PCI Plug and Play configuration) This menu tab contains items responsible for the operation of PCI and ISA buses, as well as interrupt switching control. The screen of the "PCIPnP" menu is shown in Fig. 5.10, the description of the menu is given in Table. 5.9.
  • Page 97 CPC307 Menu item Purpose PCI Latency Timer The maximum number of PCI bus clock cycles during which a device connected to this bus can keep it busy while transmitting data. [32], [64], [96], [128], [160], [192], [224], [248] Allocate IRQ to PCI VGA Authorization of the interrupt assignment to the graphics card on the PCI bus [No] Do not assign interrupt to the PCI graphics card...

  • Page 98: Boot (Boot Modes)

    CPC307 Boot (Boot Modes) This menu tab contains items responsible for module boot modes, as well as for selecting the IDE device from which the operating system will be loaded. The screen of the "Boot" menu is shown in Fig. 5.11, the description of menu items is given in Table.

  • Page 99: Table 5.11: Description Of The "Boot Settings Configuration" Menu (Configuration Of Boot Modes)

    CPC307 5.4.1 Boot Settings Configuration (Configuration of boot modes) Screen of the “Boot Settings Configuration” menu is specified in Fig. 5.12, description of menu items is given in Table 5.11. Fig. 5.12. Screen of the “Boot Settings Configuration” menu Table 5.11. Description of the “Boot Settings Configuration” menu (Configuration of boot modes) Menu item Purpose Quick Boot...

  • Page 100: Security

    CPC307 Menu item Purpose [Disabled] This option does not require waiting for user intervention in case of an error. You should only select this value if you know the reason why you might receive a BIOS error. [Enabled] Enable the BIOS to wait for pressing the "F1" key if a boot error occurs Hit ‘DEL’...

  • Page 101: Table 5.12: Description Of The Security Menu

    CPC307 Table 5.12. Description of the Security menu Menu item Purpose Change Supervisor Changing the password to allow the system to boot (request is shown during the P.O.S.T.) Password Change User Password Changing the BIOS Setup password (password is requested when entering BIOS Setup) Boot Sector Virus Protection of boot sector against viruses Protection...

  • Page 102: Chipset (Integrated Devices)

    CPC307 Chipset (Integrated devices) Screen of the “Chipset” menu is speciied in Fig 5.14. Description of the menu items is given in Table 5.13. Fig. 5.14. Screen of the "Chipset" menu Table. 5.13. Description of the "Chipset" menu (Integrated devices) Menu item Purpose SouthBridge...

  • Page 103: Table 5.14: Description Of The "South Bridge Configuration" Menu (South Bridge Configuration)

    CPC307 5.6.1 South Bridge Configuration Screen of the “South Bridge Configuration” menu is specified in Fig. 5.15, descrition of menu items is given in the Table 5.14. Fig. 5.15. Screen of the “South Bridge» menu Table 5.14. Description of the “South Bridge Configuration” menu (South Bridge Configuration) Menu item Purpose USB Port 0,1...
  • Page 104 CPC307 Menu item Purpose [IRQ 15] Assign interrupt #5 [IRQ 6] Assign interrupt #6 MAC Address (information MAC-address of the integrated Ethernet (LAN) controller field) ISA Configuration This option allows you to set timings for ISA bus - I/O and memory accesses operations (submenu) Serial/Parallel Port This option assigns the address/mode/interrupt for the serial and parallel ports...

  • Page 105: Description Of The "Isa Configuration" Menu (Isa Bus Setting)

    CPC307 5.6.1.1 ISA Configuration (ISA Bus Setting) The screen of the “ISA Configuration” menu is shown in Fig. 5.16, the description of menu items is given in Table 5.15. Fig. 5.16. Screen of the “ISA Configuration” menu Table 5.15. Description of the “ISA Configuration” menu (ISA Bus Setting) Menu item Purpose ISA Clock...

  • Page 106: Table 5.16: Description Of The "Serial/Parallel Port Configuration" Menu

    CPC307 5.6.1.2 Serial/Parallel Port Configuration The screen of the "Serial/Parallel Port Configuration" menu is shown in Fig. 5.17, the description of menu items is given in Table. 5.16. Fig. 5.17. Screen of the "Serial/Parallel Port Configuration" menu Table 5.16. Description of the "Serial/Parallel Port Configuration" menu Menu item Purpose SB Serial Port 1 SB Serial...
  • Page 107 CPC307 Menu item Purpose [Disabled] Port operation is disabled [378] Assigning the I/O base address 378h [278] Assigning the I/O base addres 278h Parallel Port Mode This option sets an operating mode for the LPT1 parallel port [BPP] Operation mode "Bi-directional Parallel Port" (BPP) Data receipt/transmission mode for parallel port [EPP 1.9 AND Operating mode compatible with the EPP 1.9 and SPP modes...

  • Page 108: Table 5.17: Description Of The Watchdog Configuration Menu

    CPC307 5.6.1.3 WatchDog Configuration The screen of the "Watchdog Configuration" menu is shown in Fig. 5.18, description of menu items is given in Table 5.17. Fig. 5.18. Screen of the "WatchDog Configuration" menu Table 5.17. Description of the WatchDog Configuration menu Menu item Purpose WatchDog 0 Function...

  • Page 109: Description Of The "Gpio And I2C Configuration" Menu

    CPC307 5.6.1.4 GPIO and I2C Configuration Screen of the “GPIO and I2C Configuration” menu is shown in Fig. 5.19, description of menu items is given in the Table 5.18. Fig. 5.19. Screen of the “GPIO and I2C Configuration” menu Table 5.18. Description of the “GPIO and I2C Configuration” menu Menu item Purpose GPIO PORT0 78H [3..0] FUNC...

  • Page 110: Table 5.19: Description Of The "Can And Com5,6 Configuration" Menu (Configuration Of Can1,2 And Com5,6 Ports)

    CPC307 5.6.1.5 CAN and COM5,6 Configuration (Configuration of CAN1,2 and COM5,6 ports) The screen of the "CAN and COM5,6 Configuration" menu is shown in Fig. 5.20, the description of menu items is given in Table. 5.19. Fig. 5.20. Screen of the "CAN and COM5,6 Configuration” menu Table 5.19.

  • Page 111: Exit

    CPC307 Exit The screen of the “Exit” menu is shown in Fig. 5.21. The description of menu items is given in Table 5.20. Fig. 5.21. Screen of “Exit” menu Table 5.20. Description of the “Exit» menu Menu item Purpose Save Changes and Exit Save changes to the settings for CMOS and FRAM and exit BIOS Setup Discard Changes and Exit Exit without saving the settings in CMOS and FRAM Discard Changes...

  • Page 112: Functional Constraints Of Bios Versions

    AMI BIOS CPC307 Functional Constraints of BIOS Versions BIOS v.3.12 (Core Version 8.00.15, created 31/01/2012) preinstalled in version 3.1 modules, has the following functional constraints: 1. Corrected skipping of Autoexec.bat at the command Ctrl+B from a console I/O. 2. Corrected console I/O for COM2 port. 3.

  • Page 113: Annex:a Disclaimer

    1.2 Use of the Fastwel products as well as the objects of intellectual property containing in them, in the ways and for the purposes, not provided by the present user manual and datasheet isn't allowed without preliminary written approval of Fastwel.

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