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Fastwel CPC316 User Manual

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CPC316
CPU Module
User Manual
Rev. 002
September 2021
The product described in this manual is compliant
with all related CE standards.

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Summary of Contents for Fastwel CPC316

  • Page 1 CPC316 CPU Module User Manual Rev. 002 September 2021 The product described in this manual is compliant with all related CE standards.
  • Page 2 Product Title: CPC316 Document name: CPC316 User Manual User Manual version: 002 Ref. docs: Copyright © 2021 Fastwel Co. Ltd. All rights reserved. Revision Record Rev. Index Brief Description Product Index Date Preliminary version CPC316 April 2020 Compliance assessment CPC316...

  • Page 3: Table Of Contents

    CPC316 Table of Contents Table of Contents ..............................1 List of Tables ................................2 List of Figures…………………………………......................3 Conventions…………………………………………………………………………………………………………………….6 General rules of usage …...……………………………………………………………………………………….………….8 Manufacturer's warranties…………………………………………………………………………………………………….8 Transportation, Unpacking and Storage …………………………………………………….………………...………….10 Description and operation ........................11 Purpose of the device…………………………………………………………………………………………..11 Technical specifications………………………………………………………………………………………..11...

  • Page 4: List Of Tables

    CPC316 List of Tables Table 1-1: Terminal board TIB972-01 (Talbe of pins) ..................14 Table 1-2: Requirements for the external power supply parameters ..............15 Table 1-3: Purpose of the power supply connector pins ................... 15 Table 1-4: Purpose oft he pins of RS-422/485 (XP8, XP4) ports ..............22 Table 1-5: Configuration of the COM3 (X6) port ....................

  • Page 5: List Of Figures

    This document contains information, which is property of Fastwel Co. Ltd. It is not allowed to reproduce it or transmit by any means, to translate the document or to convert it to any electronic form in full or in parts without antecedent written approval of Fastwel Co. Ltd. or one of its officially authorized agents.
  • Page 6 CPC316 This User Manual is designed for providing you with the operating principle and general information required for commissioning, intended use and maintenance of the CPC316 CPU module IMES.467444.114 (hereinafter referred to as the “device” or the “product”) manufactured by Fastwel Group.
  • Page 7 CPC316 Ownership rights This document contains information that is the property of Fastwel Group. It may not be copied or transmitted by any known means, nor may it be stored in information storage and retrieval systems without the prior written consent of Fastwel Group or one of its authorized agents. The information...

  • Page 8: Conventions

    CPC316 Conventions Caution, High Voltage! This sign and text warn of the dangers associated with electrical discharges (> 60 V) when touching the device or any part of it. Failure to follow the precautions mentioned or prescribed in the regulations may endanger your life or health, and may result in damages to the equipment.
  • Page 9 CPC316 Safety requirements This Fastwel Group product has been developed and tested to ensure compliance with electrical safety requirements. Its design provides long-term fail-safe operation. The product's life cycle may be significantly shortened due to mishandling during unpacking and installation. Therefore, for your own safety and for ensuring proper operation of the device, you should follow the recommendations given below.

  • Page 10: General Rules Of Usage

    Fastwel Group other than those contained in this User Manual or received from the technical support service of Fastwel Group in the form of a set of instructions for their implementation will void the warranty.
  • Page 11 Returning a product for repair Apply to Fastwel Company or to any of the Fastwel's official representatives for the Product Return Authorization. Attach a failure inspection report with a product to be returned in the form, accepted by customer, with a description of the failure circumstances and symptoms.

  • Page 12: Transportation, Unpacking And Storage

    CPC316 Transportation, Unpacking and Storage Transportation The modules should be transported in the separate manufacturer’s packaging (container), consisting of an individual antistatic packaging and a cardboard box, in closed transport (road, rail, air in heated and sealed compartments) under storage conditions 5 according to the GOST standard 15150-69 or under storage conditions 3 for sea transportation.

  • Page 13: Description And Operation

    CPC316 Description and operation Purpose of the device The device is a highly integrated solution based on the x86 platform for the use in real time systems of management, production control, data acquisition and processing and can operate in the standalone and slave mode. Connection of the main I/O means (VGA monitor, LVDS panel, keyboard, printers, USB) enables the device to be used in systems with operator participation.
  • Page 14 CPC316 Flash-drive:  - connected to SATA interface; - 8 GB NAND Flash (pSLC); - read/write rate of 100/80 MB/s; - integrated system of wear control and ECC;  LAN ports:  - 1 x Fast Ethernet 10/100 Mb/s port;...

  • Page 15: Connection To The Device

    CPC316 Digital temperature sensor  Measuring the temperature of the CPU board from - 55 to +125 °С, typical absolute error of temperature measurement ± 0.5 °C (within the range from +10 to +50 °C); ± 1.0 °C (within the range from - 10 to +85 °C);...

  • Page 16: Power Supply

    CPC316 PC-compatible printer (USB port);  RTU modules with galvanic isolation (via the MPB-24 or TBI-24/16L and TBI-24LC boards);  Terminal boards for the digital I/O port for passing from IDC-xx and IDC2-xx connectors to  WAGO terminal strips: TIB972.

  • Page 17: Table 1-2: Requirements For The External Power Supply Parameters

    CPC316 The power supply should provide the starting current specified in Table 1-2. It is also permitted to use a power supply with a current limiting mode for at least 3.0 A (excluding any peripherals connected). When choosing a power supply, the starting current and the current consumption of expansion modules and other devices connected to the device ports, should be considered.

  • Page 18: Block Diagram

    CPC316 1.5 Block diagram Fig. 1-2 – Block diagram of the device © 2 0 2 1 F a s t w e l V e r . 0 0 2 C P C 3 1 6 U s e r...

  • Page 19: Location Of Main Elements

    CPC316 1.6 Location of main elements Fig. 1-3 – Location of main elements of the device on the top side of the board © 2 0 2 1 F a s t w e l V e r . 0 0 2...
  • Page 20 CPC316 Fig. 1-4 Location of the main elements of the device on the bottom side of the board The assignment of connectors and switches is given in paragraph 1.9 Structure and functioning and paragraph 3.1 Setting the switches. The device is made in accordance with the PC/104-plus v.2.0 specification.

  • Page 21: Versions

    Note The modules with conformal coating obtain the “\СOATED” inscription when ordered. 1.8 Delivery checklist The standard delivery checklist includes: 1. CPC316 CPU Module 2. Installation kit – 1 pcs. 3. Packaging. The installation kit for IMES.467941.053 includes: 1. Jumper – 1 pcs.
  • Page 22 CPC316 1.9.2 Supervisor, Watchdog, Reset The device includes a power supply supervisor (a microchip that monitors the power supply voltage of the device), as well as 3 watchdog timers: 2 watchdog timers integrated into the CPU (WDT0, WDT1). The supervisor generates a hardware reset signal when the "3.3V"...
  • Page 23 CPC316 Caution! WHEN USING THE DEVICE UNDER SEVERE OPERATING CONDITIONS, IT IS NECESSARY TO TAKE ADDITIONAL MEASURES TO FIX THE COMPACT FLASH IN THE CONNECTOR! External view and overall dimensions of the additional fastener 7E50-C016-00, 3M (not included in the product delivery checklist) are shown in Figure 1-6.

  • Page 24: Table 1-4: Purpose Oft He Pins Of Rs-422/485 (Xp8, Xp4) Ports

    CPC316 Table 1-4 – Purpose oft he pins of RS-422/485 (XP8, XP4) ports COM3-4: B 5B-PH-KL (JST) Pin # Function (RS-422) Function (RS-485) RTxD+ RTxD- GNDS GNDS The “GNDS” circuit corresponds to the signal isolated “ground” of the interface, the GNDS circuits of the different ports are isolated from each other and are not interconnected.
  • Page 25 CPC316 Each port contains lightning protection circuits based on resettable fuses and gas discharge elements. The port also contains TVS diode-based pulse interference protection circuits. The diagram of the output stages of the COM3 port is shown below (the COM4 port has a similar circuit design).

  • Page 26: Table 1-7: Purpose Of The Pins Of Rs-232 (Xp13, Xp14) Ports

    CPC316 Fig. 1-8 – Connecting modules via RS-422 interface The COM1 (XP13) and COM2 (XP14) ports operate in RS-232 mode. The maximum baud rate for COM1 and COM2 is 115.2 Kb/s. The ports are fully software compatible with the 16550 UART model.

  • Page 27: Table 1-8: Frequency Divider Values For Serial Ports

    CPC316 COM1 (RS-232): 0x3F8 / IRQ4, [115200 8,n,1] COM2 (RS-232): 0x2F8 / IRQ3, [115200 8,n,1] COM3 (RS-485): 0x3E8 / IRQ4, [115200 8,n,1] COM4 (RS-485): 0x2E8 / IRQ3, [115200 8,n,1] The baud rate for serial ports can be set in the BIOS Setup. The exchange rate is determined by the value of the CPU frequency divider register.

  • Page 28: Table 1-9: Purpose Of Pins Of The Usb (Xp19) Ports

    CPC316 1.9.9 USB1-4 ports The Device Controller has 4 x USB Host ports supporting USB 1.1 and USB 2.0 specifications. The operating mode of the interfaces is set in the BIOS Setup menu. Each of the channels has an independent power supply control circuit and power protection (+5 V, 500 mA).

  • Page 29: Table 1-10: Purpose Of Pins Of The Lan1 (Xp10) Port

    CPC316 Table 1-10 – Purpose of pins of the LAN1 (XP10) port LAN1: 98414-G06-10LF (FCI) Function Function MD0+ / TX+ MD0- / TX- MD1+ / RX+ MD1- / RX- MD2+ MD2- MD3+ MD3- Table 1-11 – Purpose of pins of the LAN2 (XP15) port...
  • Page 30 CPC316 Fig. 1-9 - Diagram of one channel of the port of digital input-output The function (scheme) of the port can be changed directly in the system (ISP technology, in- system-programming) without turning off the power. The port channels can be used to control RTU modules with galvanic isolation, pulse counting, frequency measurement and generation, time diagrams, etc.

  • Page 31: Table 1-12: Binding Levels Of Unio Ports Lines (X20)

    CPC316 Table 1-12 – Binding levels of UNIO ports lines (X20) Jumper Description Binding the lines IO_A[23:0] via resistors 10 kOhm to X20[1-3] the power supply voltage +5V Binding the lines IO_A[23:0] via resistors 10 kOm to the X20[3-5] ground (GND)

  • Page 32: Table 1-14: Purpose Of Pins Of The Dio (Unio Io_B[23:0] , Xp18) Connector

    CPC316 Table 1-14 – Purpose of pins of the DIO (UNIO IO_B[23:0] , XP18) connector UNIO IO_B: 98424-G52-26LF (FCI) Function Function IO_B(12) +5V_EXTB IO_B(13) IO_B(10) IO_B(14) IO_B(11) IO_B(15) IO_B(9) IO_B(23) IO_B(8) IO_B(21) IO_B(22) IO_B(16) IO_B(20) IO_B(18) IO_B(17) IO_B(19) IO_B(7) IO_B(0)

  • Page 33: Table 1-15: Purpose Of The Vga Port Pins (Xp2)

    CPC316 The VGA (XP2) port is routed to a two-row 10-pin connector with a pitch of 2 mm, 98414-G06- 10LF (FCI). As a mating part, you should use a 10-pin 89947-710LF (FCI) socket for a ribbon cable with a pitch of 1 mm or a 10-pin 10073599-010LF (FCI) socket with 77138-101LF (FCI) pins. A ready-made cable (IDC2-10 - DB15F) ACS00027-02 is available for order, with a length of 17 cm.

  • Page 34: Table 1-17: Purpose Of Audio Ports Pins (Xp17, Xp6)

    CPC316 To manufacture the cable, it is recommended to use a PHR-3, JST socket with SPH-002T-P0.5S pins, JST (available for ordering as a set ACS00031-04). Table 1-17 – Purpose of Audio ports pins (XP17, XP6) Audio out: B 3B-PH-K-S (JST)

  • Page 35: Table 1-19: Purpose Of Xs1 Connector Pins: Pc/104 (Isa 8/16-Bit) Rows C, D

    CPC316 SA12 Output DACK0# Output SA11 Output BCLK Output SA10 Output IRQ7 Input Output IRQ6 Input IRQ5 Input Output ISA: Connector of PC/104 bus expansion (2х32 + 2х20 pins), rows A, B Pin # Purpose Configuration Pin # Purpose Configuration...

  • Page 36: Table 1-20: Purpose Of Xs2 Connector Pins: Pci/104 (Pcu 32-Bit) Rows A, B

    CPC316 Fig. 1-10 – Numbering pins of the XS1 connector a) top view of the device, b) bottom view of the device with the organizer installed into connector 1.9.16 PC/104-plus expansion bus (PCI 32-bit) The device can be connected to 3 x expansion boards of the PC/104-plus or PCI/104 format. The PCI104 bus (PCI, 32 bit, 33 MHz) supports up to 3 x PCI master devices.

  • Page 37: Table 1-21: Purpose Of Xs2 Connector Pins: Pci/104 (Pcu 32-Bit) Rows C, D

    CPC316 REQ0# Input Power supply Power supply REQ2# Input GNT1 Output VI/O +3.3V (output) Power supply CLK0 Output CLK2 Output Input Power supply INTD# Input +12V INTA# Input REQ3# Input Table 1-21 – Purpose of XS2 connector pins: PCI/104 (PCU 32-bit) rows C, D PCI: Connector of PCI/104 bus expansion (4х30 pins), rows C, D...

  • Page 38: Table 1-22: Purpose Of Device Leds

    CPC316 Fig. 1-11 – Numbering XS2 connector pins a) top view of the device, b) bottom view of the device with the organizer installed into connector 1.9.17 Diagnostic LEDs and XP9 connector All the LEDs are located on the top side of the device. The purpose of the LEDs is shown in Table 1-23.
  • Page 39 CPC316 XP9[7-8] Indication of reset XP9[9-10] Indication of exchange between SSD and Compact Flash XP9[11-12] User LED (port 0x281h, red) XP9[13-14] User LED (port 0x281h, green) * Even pins correspond to the cathode “-“, odd pins – to the anode “+” for connection of LED.

  • Page 40: Table 1-24: Purpose Of Adc Channels Adc_Aux [7:0]

    CPC316 Table 1-24 – Purpose of ADC channels ADC_AUX [7:0] Power supply voltage port ADC_AUX +5 V (main supply voltage) at the input a voltage divider ½ is installed ADC_AUX [0] (implemented on 2 x 1 kOhm resistors, 1%) ADC_AUX [1] +3.3 V (supply voltage used to start the secondary converters: 0.95, 1.2, 1.35,...

  • Page 41: Labelling

    CPC316 1.10 Labelling The consumer container used for storing the product is labelled by means of an individual identifier (sticker). The consumer container sticker contains the following information: Product designation in accordance with the ordering information; Device version; Serial number of the device;...

  • Page 42: Intended Use

    CPC316 2 Intended Use 2.1 Operating limitations The safety requirements listed at the beginning of this User Manual should be strictly observed. Installation and removal of the device, connection to the slots should be carried out only with the power supply turned off. Always observe the proper orientation of the device connectors during installation.

  • Page 43: Dma Channels

    CPC316 2.3 DMA channels Table 2-2 – DMA channels of the device Source – DRQ0 – DRQ1 – DRQ2 – DRQ3 – DRQ5 – DRQ6 – DRQ7 2.4 I/O address space Table 2-3 – Distribution of I/O address space Address...

  • Page 44: Memory Address Space

    CPC316 2.5 Memory address space Table 2-4 – Addresses of memory devices Address Device Notes 00000 – 9FFFFh DOS Area 640 Kbyte A0000 – BFFFFh Video memory area 128 Kbyte C0000 – C7FFFh VGA BIOS VGA BIOS 32 Kbyte C8000 – DFFFFh –...

  • Page 45: Table 2-6: Purpose Of Gpio Ports

    CPC316 Table 2-6 – Purpose of GPIO ports I/O port line I/O port line direction Description Reserved. GPIO_P0 [7:0] Input / Output The lines are used for COM1 port (RS-232). Reserved. GPIO_P1 [7:0] Input / Output The lines are used for COM2 port (RS-232).

  • Page 46: Wdt0 And Wdt1 Watchdog Timers

    CPC316 2.7 WDT0 and WDT1 watchdog timers The Vortex86DX3 CPU chip has 2 x configurable hardware watchdog timers. The WDT0 timer registers are accessed through port 65h and ports 22h (Address Index Register) and 23h (Data Register). To access the registers, it is necessary to write the address of the port to port 22h, the reading and/or writing of data of which is carried out through the 23h port.

  • Page 47: Table 2-10: Register Of Wdt0 Timer Control

    CPC316 Table 2-10 – Register of WDT0 timer control Address Bits (in the data register 23h) (in the Action register of address 22h) WDT0_WE Write 37h (40h) WDT0_WE Read WDT1_WE. Permission for WDT0 watchdog timer operation. 1 – permitted; 0 – prohibited (default value).

  • Page 48: Table 2-13: Register Cnt1 Of The Wdt0 Timer Value

    CPC316 Table 2-13 – Register CNT1 of the WDT0 timer value Address Bits (in the data register 23h) (in the Action register of address 22h) WDT0_CNT1 Write (00h) WDT0_CNT1 Read WDT0_CNT1. Bits [15:8] of the WDT0_CNT[23:0] counter of WDT0 timer. Counter resolution is 30.5 µs.

  • Page 49: Table 2-17: Wdt1 Timer Control Register

    CPC316 Table 2-17 –WDT1 timer control register Bits Address Action WDT1_WE Write 68h (00h) WDT1_WE Read WDT1_WE. Permission for WDT1 watchdog timer operation. 1 – Permitted; 0 – Prohibited (default value). Table 2-18 - WDT1 event selection register Bits Address...

  • Page 50: Description Of Internal Registers

    CPC316 Table 2-20 – Register CNT1 of WDT1 timer value Bits Address Action WDT1_CNT1 Write (00h) WDT1_CNT1 Read WDT1_CNT1. Bits [15:8] of WDT1_CNT[23:0] counter of WDT1 timer. Counter resolution is 30.5 µs. Table 2-21 – Register CNT2 of WDT1 timer value...
  • Page 51 CPC316 Address Port Notes Port for control of interrupts IRQ7,11,12,15 of the processor (sets the source over the processor interrupt Register for control of interrupts BA+06h lines (UNIO, ISA$IRQx, ADC/DAC Ready, SYSTEM IRQ7,11,12,15 BA+07h EVENT, MXKEY)). ISA control register Enabling/ Disabling ISA bus buffers.
  • Page 52 CPC316 2.8.2 Register for selecting the active firmware of the UNIO port Selecting an active configuration of the UNIO port via the byte port. Bits Address Action 0x28Fh Write IO_B CODE IO_A CODE IO_B CODE, IO_A CODE - numeric code of active firmware of digital input-output ports IO_A (XP16) and IO_B (XP18): "n00"...
  • Page 53 CPC316 LED_EN Permit LED blinking when accessing the FPGA ports (~80 ms) and while switching to the active level (edge) on one of the IRQx, NMI interrupt lines (~160 ms). To activate the LED when there is an edge on the interrupt line, the relevant IRQx_EN bit of register BA+0Ch and NMI_EN of the register BA+05h must be set.
  • Page 54 CPC316 Bits Address Action BA+06h Write/Read i15SEL[1:0] i14SEL[1:0] i11SEL[1:0] i7SEL[1:0] BA+07h Write IOB_EN IOA_EN ISAE BA+07h Read IOB_ST IOA_ST ISAE i7SEL[1:0] Selector code of IRQ7 line. Possible options: IRQ7 interrupt of ISA bus is not used (b'00, by default); UNIO (b'01); "SYSTEM EVENT" (b'10); ISA$IRQ7 (b'11).
  • Page 55 CPC316 Attention! After each generation of interrupts from UNIO ports, the corresponding interrupt flag must be reset by sequentially writing '0' and then '1' to the relevant interrupt permission bit. Failure to do so, further generation of interrupts from this port will not be performed.
  • Page 56 CPC316 IO[7:0] Register of the state of I/O port page. 2.8.7 Registers of the code of FPGA scheme version and device Code of the version number/ revision of FPGA scheme and numeric code of the device are available by reading via the byte ports BA+0Eh and BA+0Fh.
  • Page 57 CPC316 • Configuration of channels in an arbitrary combination (input/output, digital/analog); • Issue / reading of digital signals; • Measuring frequency over any channel: the number of periods of the measured frequency - 8, range: from 3.1 kHz to 5 MHz (period of the filling frequency 20 nsec) or from 3.1 Hz to 5 kHz (period of filling frequency 20 μs), accuracy: up to 16 bits;...
  • Page 58 CPC316 Control register is available via port with the address BAx+0 and has the following format: Bits Address Action – – – BAx+00h Write F_CLK CLKD BANK – – – – – BAx+00h Read AO_RDY F_RDY F_ERR AO_RDY Readiness of the serial code generator. The bit is set upon completion of the code issuance.
  • Page 59 CPC316 Output mask registers have the size of 24 bits. Each bit defines the relevant channel to operate as an input (bit value “0”) or output (bit value “1”). The register is available by writing and reading via ports with the addresses BAx+1 … BAx+3 when the BANK (BANK=1) bit is set.
  • Page 60 CPC316 Channel Period Channel Period Channel Period 20 μs IO[0] 250 ns IO[8] IO[16] 800 ms 40 μs IO[1] 500 ns IO[9] IO[17] 1 ms 1 μs 50 μs IO[2] IO[10] IO[18] 2 ms 2 μs 80 μs IO[3] IO[11]...
  • Page 61 CPC316 Generator of serial code (AO) has two registers: AO control register and AO data register. For proper operation of the generator, the used channel must first be set as “output” by writing “1” to the corresponding bit of the output mask register, the state of the used channel must be set by writing “1”...

  • Page 62: Table 2-23: Table Of External Connections For "N00" Firmware

    CPC316 Fragment of an example in C language for launching frequency meter, selection of measuring channel, period calculation is given below: #define 0x290 // base address unsigned int // Base address of the input port float f,p; // Frequency & Period...
  • Page 63 CPC316 2.8.11 Description of UNIO port configuration option “p55” 24-channel I/O port (emulator of IC 8255 mode 0). This section describes the purpose of the UNIO port with address BAx (0xA110), code “p55”. The “p55” option is fully compatible with the option p55 for the UNIOxx family and makes it...

  • Page 64: Table 2-24: Table Of "P55" Firmware Registers

    CPC316 Table 2-24 – Table of "p55" firmware registers Designation Channel Address Note Port A IO [7 : 0] BAx + 0 Designed for setting outputs and reading Port B IO [15 : 8] BAx + 1 the status of inputs/outputs...
  • Page 65 CPC316 Register of input debouncing time is available by writing/reading and has the following format: Bits Address Action BAx+04h Write/Read FR_C [1:0] FR_B [1:0] FR_A [1:0] T [1:0] FR_C[1:0], FR_B[1:0], FR_A[1:0] Event edge code: 0x00 – not used, 0x01 – ↑ (leading edge), 0x02 – ↓ (falling edge), 0x03 –...

  • Page 66: Table 2-25: External Connections For The "P55" Firmware

    CPC316 The firmware identifier is available by reading via the byte ports with the addresses BA+0x0E, BA+0x0F and has the following format: Bits Address Action BAx+0Eh Read BAx+0Fh Read SN [7:0] ASCII-code of the lowercase Roman letter 'p' (0x70). SN[7:0] Decimal code of scheme number (SN[7:0]=55).
  • Page 67 CPC316 2.8.12 Description of the configuration option "c02" of UNIO port 24 counters with debouncing of counter inputs and programmable transfer. This section describes the purpose of UNIO port with the address BAx (0xA110), scheme code "c02". The "c02" option is compatible with the option c02 for UNIOxx family and makes it possible to...
  • Page 68 CPC316 T[1:0] Time code of counter input debouncing: '00' = 100 ns, '01' = 1.6 µs, '10' = 4 ms, '11' = 120 BANK[1:0] Code of the 0…3 port bank. The counter reset registers are available by writing via the byte ports BAx+0x01, BAx+0x02,...
  • Page 69 CPC316 Registers of CT0… CT23 counters states are available by reading via the word ports (16 bits) with the addresses BAx+00h … BAx+0Ah with the relevant installed BNK(1:0) code. A true value can only be obtained by reading the entire 16-bit value of the counter (least significant byte, then the most significant byte).

  • Page 70: Table 2-26: External Connections For The "C02" Firmware

    CPC316 CTx[15:0] Counter value for channel IO [x], where x is a channel number from 0 to 23. In case of setting a transfer, counting will be carried out on an even channel (0, 2, 4, 6, 8, 10). The firmware identifier is available for reading via byte ports with the addresses BA+0x0E,...
  • Page 71 CPC316 2.8.13 Description of the UNIO port configuration option "q04" 8 PWM signal conditioners. This section describes the purpose of the UNIO port with the address BAx (0xA110), scheme code "q04". The "q04" option is compatible with the q02 option for the UNIOxx family and makes it...
  • Page 72 CPC316 Registers of PWM conditioners are designed to select the range, connect outputs and set the duration of half-periods. The registers are available by writing via word or byte ports with addresses BAx + 0… BAx + 0x0F. Bits Address …...

  • Page 73: Table 2-27: Ranges Of The "Q04" Conditioner

    CPC316 Table 2-27 – Ranges of the “q04” conditioner Code xR[1:0] Filling frequency Period of filling frequency Range of Gx conditioner output frequency 1.25 kHz – 2.5 MHz 10 MHz 100 nsec 10 µs 12.5 Hz – 25 kHz 100 kHz 0.125 Hz –...

  • Page 74: Table 2-28: External Connections For The "Q04" Firmware

    CPC316 Table 2-28 – External connections for the “q04” firmware Code of the Code of the xN[1:0] conditioner xN[1:0] conditioner Function Function conditioner conditioner output output – – IO(12) +5V_EXT IO(13) IO(10) IO(14) IO(11) IO(15) IO(9) IO(23) IO(8) IO(21) IO(22)
  • Page 75 CPC316 The block diagram of 2 counter channels is specified below. The control register is available by writing through the port with the address BAx + 0 and has the following format: Bits Address Action – BAx+01h Read Write /...
  • Page 76 CPC316 INT3…INT0 Enabling generation of interrupts. Setting the bits enables the generation of interrupts from the CT0… CT3 counters, resetting a bit - disables. Interrupt signals appear when the states of the counters match with the maximum values written in the registers MAXC0 ...

  • Page 77: Table 2-29: Table Of External Connections For "T00" Firmware

    CPC316 ASCII- code of the lowercase Roman letter 'с' (0x74). SN[7:0] Decimal code of scheme number (SN[7:0]=0). Table 2-29 - Table of external connections for “t00” firmware Function Purpose Function Purpose – – IO(12) +5V_EXT – IO(13) IO(10) GATE3 –...

  • Page 78: Installation And Configuration

    CPC316 3 Installation and configuration The device is made in PC/104-plus format. Expanding the functionality of the device is possible by connecting the additional PC/104 and PC / 104-plus expansion modules. 3.1 Setting the switches For hardware configuration of the device, the switches are used, which general description is given in Table 3-1.

  • Page 79: Software

    Operation of the device with AT keyboard and VGA monitor When connecting a USB keyboard and a VGA monitor to the device, the CPC316 controller can be used as a regular AT(x86)-compatible computer. Launching and debugging programs in this case is performed as usual and is not covered in this UM.

  • Page 80: Bios Soc Vortex86Dx3 Interface For Reading Serial Number

    CPC316 4.4 BIOS SOC Vortex86DX3 interface for reading serial number To store the device parameters, the FRAM array is used. For storing the entire system information, the size of 1Kbyte is used (might slightly differ depending on BIOS version). 4.4.1 Array structure...

  • Page 81: Service Programs

    CPC316 Output: AX = result code (0 – no error, -2 (0FFFEh) – parameter error, invalid address) BX = maximum allowed address (size of the user area -1) CX = number of bytes actually read This function reads the specified bytes of the FRAM user area into the calling program’s buffer.

  • Page 82: Bios Update

    CPC316 automatically carried out and the controller will start with the default settings). Windows OS must be installed on the PC you are using. Syntax: cmos_rst.exe [COM] where [COM] is the number of the COM-port used in the PC, this would be COM1 by default.

  • Page 83: Working With I2C Devices

    CPC316 outpd( 0xCFC, pci_reg ); // write register enable(); // enable interrupts 4.9 Working with I2C devices As an example of working with i2c devices, you can use the vortex86_i2c library (library files "vortex86_i2c.c", "vortex86_i2c.h" and sample files are available on the manufacturer's and distributor's ftp servers.
  • Page 84 CPC316 If the identifier is correct, the temperature will be read timeout = I2C_ReadWordReg( I2C_CHANNEL0, LM92_WR_ADDR, 0x00, &rd_temp, DEF_TIMEOUT Converted to the usual form and routed to the console rd_temp = rd_temp >> 3; if( rd_temp & 0x2000 ) { temp = -1;...

  • Page 85: Basic Input / Output System (Bios)

    CPC316 5 Basic Input / Output System (BIOS) To enter BIOS Setup, while booting the system during the POST (Power On Self Test) procedure, press the DEL key on the keyboard or the F4 key on the console PC keyboard (when the Console Redirect option is enabled).

  • Page 86: Main

    (BIOS version information) VGA BIOS Version Build Date XC6S Rev. – version of the system FPGA Fastwel FPGA Firmware (Versions and IDs of integrated XC6S ID – ID of the UNIO port firmware FPGAs firmware) Processor Information related to the CPU installed: Vortex A9126 –...

  • Page 87: Advanced

    CPC316 System Memory Information on the DDR2 SDRAM installed: Size (information field) Speed Menu item Purpose System Time Current time in format [hour/min/sec] System Date Current date in format [month/day/year] 5.2 Advanced This tab contains the items responsible for the operation of the soldered ATA Flash Disk, processor Cache memory, IDE bus, console I/O and USB devices.

  • Page 88: Table 5-3: Description Of The "Ide Configuration" Menu

    CPC316 Remote Access Settings of the console I/O Configuration (submenu) USB Configuration Settings of USB ports. These settings apply to all 4 x USB ports (submenu) Menu item Purpose Power Management ACPI, APM settings Configuration (submenu) Smbios Configuration SMBIOS settings (submenu) 5.2.1 IDE Configuration...
  • Page 89 CPC316 Primary IDE Slave Not used. (submenu) Secondary IDE Master This section stores information on the connected IDE device, working in the Slave mode. Integrated SATA drive for 8 GB is connected. (submenu) Menu item Purpose Secondary IDE Slave Not used.

  • Page 90: Table 5-4: Description Of The "Primary Ide Master" Menu

    CPC316 5.2.1.1 Secondary IDE Master The screen of the “Primary IDE Master” and description of the items are given below. The “IDE Primary Master and Slave” menus are fully identical to the “Secondary IDE Master” menu. Fig. 5-5 – Screen of the “Secondary IDE Master” menu Table 5-4 –...
  • Page 91 CPC316 Menu item Purpose [Disabled] This option disables BIOS from using the Multi-Sector Transfer mode on the current channel. Data to/from the device will be transmitted one sector per unit of time. PIO Mode Programmed I/O (PIO) mode [Auto] This option allows BIOS to automatically determine if the device supports the PIO mode.

  • Page 92: Table 5-5: Description Of The "Remote Access Configuration" Menu

    CPC316 5.2.2 Remote Access Configuration Screen of the “Remote Access Configuration” menu and description of the items are given below. Fig. 5-6 – Screen of the “Remote Access Configuration” menu Table 5-5 – Description of the “Remote Access Configuration” menu...
  • Page 93 CPC316 Flow Control Controlling the stream of characters for console port [None] [Hardware] CTS/RTS hardware control [Software] XON/XOFF software control Redirection After The mode of the console I/O port operation after passing the POST procedure by BIOS POST the BIOS...

  • Page 94: Table 5-6: Description Of The "Usb Configuration" Menu

    CPC316 5.2.3 USB Configuration Screen of the “USB Configuration” menu and description of items is given below. Fig. 5-7 – Screen of the “USB Configuration” menu Table 5-6 – Description of the “USB Configuration” menu Menu item Purpose Legacy USB Support Support of the Legacy USB mode.

  • Page 95: Pci / Pnp

    CPC316 5.3 PCI / PnP This tab contains items responsible for the operation of PCI and ISA buses, as well as interrupt switching management. The screen of PCI/PnP menu and menu descriptions are shown below. Fig. 5-8 – Screen of the “PCI/ PnP” menu ©...

  • Page 96: Table 5-7: Description Of The "Pci/ Pnp" Menu

    CPC316 Table 5-7 – Description of the “PCI/ PnP” menu Menu item Purpose Clear NVRAM Reset of PnP parameters table [No] Without change [Yes] Reset the table after reboot Plug & Play O/S OS with PnP support is installed [No]...

  • Page 97: Boot

    CPC316 DMA Channel 1 [Available] Enable the use of this DMA channel by the PCI/PnP devices DMA Channel 3 DMA Channel 5 [Reserved] Disable the use of this DMA channel by the PCI/PnP devices, DMA Channel 6 reserve for the Legacy devices.

  • Page 98: Table 5-9: Description Of The "Boot Settings Configuration" Menu

    CPC316 5.4.1 Boot Settings Configuration Screen of the “Boot Settings Configuration” menu and description of the menu items are given below. Fig. 5-10 – Screen of the “Boot Settings Configuration” menu Table 5-9 – Description of the “Boot Settings Configuration” menu...

  • Page 99: Security

    CPC316 [Enabled] Support is enabled Menu item Purpose [Auto] Automatic detection of support. Recommended value Wait for ‘F1’ If Error Waiting for F1 to be pressed in the event of an error [Disabled] This option does not require waiting for user intervention in the event of an error.

  • Page 100: Table 5-10: Description Of The "Security" Menu

    CPC316 Table 5-10 – Description of the “Security» menu Menu item Purpose Change Supervisor Changing the password to allow system boot process (the request is displayed at Password the time of P.O.S.T.) Change User Password Changing password for accessing to BIOS Setup (requested when entering BIOS...

  • Page 101: Table 5-11: Description Of The "Southbridge Configuration" Menu

    CPC316 Submenu “I/O Interface Security” and description of menu items are given below. Fig. 5-12 – Screen of the “SouthBridge Configuration” menu Table 5-11 – Description of the “SouthBridge Configuration” menu Menu item Purpose USB Control 1 Interface Controlling operation of the 0...

  • Page 102: Exit

    CPC316 5.6 Exit Screen of the “Exit” menu and the relevant description are given below. Fig. 5-13 – Screen of the “Exit” menu Table 5-12 – Description of the “Exit» menu (output) Menu item Purpose Save Changes and Exit Save settings in the CMOS and FRAM memory and exit BIOS Setup...

  • Page 103: Annex A

    CPC316 ANNEX A Device programming FAQ 1. Problem with the console via COM-port. You can enter the BIOS Setup, but when DOS starts, it is no longer possible to get there using keyboard via terminal. What is the reason? The most likely reason for this problem is BIOS Setup. By default, the remote console integrated into the AMI BIOS is enabled only until the BIOS transfers control to the operating system.

  • Page 104: Annex B

    CPC316 ANNEX B Terms and abbreviations Abbreviation Definition ACPI Advanced Configuration and Power Interface Accelerated Graphics Port AGTL Advanced Gunning Transceiver Logic BIOS Basic Input-Output System Digital-Analog Converter DDR SDRAM Double Data Rate Synchronous Dynamic Random Access Memory Direct Memory Access...
  • Page 105 CPC316 Abbreviation Definition Firmware Hub GMCH Graphics and Memory Controller Hub C™ Inter Integrated Circuit Liquid crystal display Low Pin Count LVDS Low Voltage Differential Signal Media Dependent Interface Personal Computer Programmed Input/Output PLCC Plastic Leaded Chip Carrier Peripheral Management Controller...
  • Page 106 CPC316 RAMDAC Random Access Memory Digital-to-Analog Converter Real Time Clock System Management Bus Abbreviation Definition SMBus System Management Bus SODIMM Small Outline Dual In-Line Memory Module Solid State Disk Thin Film Transistor Transistor-Transistor Logic UART Universal Asynchronous Receiver-Transmitter UHCI Universal Host Controller Interface...

  • Page 107: Annex C: Disclaimer

    1.2 Use of the Fastwel products as well as the objects of intellectual property containing in them, in the ways and for the purposes, not provided by the present user manual and datasheet isn't allowed without preliminary written approval of Fastwel.

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