Acer Q1VZC Schematics Document page 12

A
+1.5V
R67
1K_0402_1%
M3 support(unpop) R62
0_0402_5%
1 2
<9> SB_DIMM_VREFDQ
@
3 1
R63
@ Q3 1K_0402_1%
BSS138_NL_SOT23-3
1
<6,11> RST_GATE_R
DDR_B_DQS#[0..7] <6>
DDR_B_DQS[0..7] <6>
DDR_B_D[0..63] <6>
DDR_B_MA[0..15] <6>
All VREF traces should
Layout Note:
have 10 mil trace width
Place near JDIMM2
+1.5V
1 1 1 1
<6> DDRB_CKE0_DIMMB
2 2 2 2
2
+1.5V
1 1 1 1
<6>
<6>
2 2 2 2
<6>
<6>
<6>
<6> DDRB_CS1_DIMMB#
+1.5V
1
1 1 1
+
C139
330U_D2_2V_Y
@ @
2 2 2 2
SGA20331E10
330U 2V H1.9
9mohm POLY
3
+0.75VS
1 1 1 1
2 2 2 2
Layout Note:
Place near JDIMM2.203,204
+3VS
+0.75VS
4
A
B
+V_DDR_REFB +1.5V
JDIMM2
+V_DDR_REFB 1
VREF_DQ VSS
3
VSS DQ4
DDR_B_D0 5
DQ0 DQ5
DDR_B_D1 7
DQ1 VSS
9
VSS DQS0#
11
DM0 DQS0
13
VSS VSS
DDR_B_D2 15
1 1
DQ2 DQ6
17
DDR_B_D3
DQ3 DQ7
19
VSS VSS
21
DDR_B_D8
2 2 DQ8 DQ12
23
DDR_B_D9
DQ9 DQ13
25
VSS VSS
DDR_B_DQS#1 27
DQS1# DM1
DDR_B_DQS1 29
DQS1 RESET#
31
VSS VSS
DDR_B_D10 33
DQ10 DQ14
DDR_B_D11 35
DQ11 DQ15
37
VSS VSS
DDR_B_D16 39
DQ16 DQ20
DDR_B_D17 41
DQ17 DQ21
43
VSS VSS
DDR_B_DQS#2 45
DQS2# DM2
DDR_B_DQS2 47
DQS2 VSS
49
VSS DQ22
DDR_B_D18 51
DQ18 DQ23
DDR_B_D19 53
DQ19 VSS
55
VSS DQ28
DDR_B_D24 57
DQ24 DQ29
DDR_B_D25 59
DQ25 VSS
61
VSS DQS3#
63
DM3 DQS3
65
VSS VSS
67
DDR_B_D26
DQ26 DQ30
69
DDR_B_D27
DQ27 DQ31
71
VSS VSS
DDRB_CKE0_DIMMB 73
CKE0 CKE1
75
VDD VDD
77
NC A15
DDR_B_BS2 79
<6> DDR_B_BS2 BA2 A14
81
VDD VDD
DDR_B_MA12 83
A12/BC# A11
DDR_B_MA9 85
A9 A7
87
VDD VDD
DDR_B_MA8 89
A8 A6
DDR_B_MA5 91
A5 A4
93
VDD VDD
DDR_B_MA3 95
A3 A2
DDR_B_MA1 97
A1 A0
99
VDD VDD
SB_CLK_DDR0 101
SB_CLK_DDR0
CK0 CK1
103
SB_CLK_DDR#0
SB_CLK_DDR#0
CK0# CK1#
105
VDD VDD
107
DDR_B_MA10
A10/AP BA1
109
DDR_B_BS0
DDR_B_BS0
BA0 RAS#
111
VDD VDD
DDR_B_WE# 113
DDR_B_WE# WE# S0#
DDR_B_CAS# 115
DDR_B_CAS# CAS# ODT0
117
VDD VDD
DDR_B_MA13 119
A13 ODT1
DDRB_CS1_DIMMB# 121
S1# NC
123
VDD VDD
125
TEST VREF_CA
127
VSS VSS
DDR_B_D32 129
DQ32 DQ36
DDR_B_D33 131
DQ33 DQ37
133
VSS VSS
DDR_B_DQS#4 135
DQS4# DM4
DDR_B_DQS4 137
DQS4 VSS
139
VSS DQ38
DDR_B_D34 141
DQ34 DQ39
DDR_B_D35 143
DQ35 VSS
145
VSS DQ44
DDR_B_D40 147
DQ40 DQ45
149
DDR_B_D41
DQ41 VSS
151
VSS DQS5#
153
DM5 DQS5
155
VSS VSS
157
DDR_B_D42
DQ42 DQ46
DDR_B_D43 159
DQ43 DQ47
161
VSS VSS
DDR_B_D48 163
DQ48 DQ52
DDR_B_D49 165
DQ49 DQ53
167
VSS VSS
DDR_B_DQS#6 169
DQS6# DM6
DDR_B_DQS6 171
DQS6 VSS
173
VSS DQ54
DDR_B_D50 175
DQ50 DQ55
DDR_B_D51 177
DQ51 VSS
179
VSS DQ60
DDR_B_D56 181
DQ56 DQ61
DDR_B_D57 183
DQ57 VSS
185
VSS DQS7#
187
DM7 DQS7
189
VSS VSS
DDR_B_D58 191
DQ58 DQ62
193
DDR_B_D59
DQ59 DQ63
195
VSS VSS
197
SA0 EVENT#
199
VDDSPD SDA
1 R61 2 10K_0402_5% 201
SA1 SCL
203
VTT VTT
205
GND1 GND2
207
1 1
BOSS1 BOSS2
TYCO_2-2013287-1
2 2
CONN@
SP07000KW00
<Address: SA1:SA0=10>
12/21 Modify
DIMM_2 Reverse H:4.0mm
B
C
+1.5V
2
4 DDR_B_D4
6 DDR_B_D5
8
10 DDR_B_DQS#0
12 DDR_B_DQS0
14
16 DDR_B_D6
18
DDR_B_D7
20
22
DDR_B_D12
24
DDR_B_D13
26
28
30 DIMM_DRAMRST#
DIMM_DRAMRST# <6,11>
32
34 DDR_B_D14
36 DDR_B_D15
38
40 DDR_B_D20
42 DDR_B_D21
44
46
48
50 DDR_B_D22
52 DDR_B_D23
54
56 DDR_B_D28
58 DDR_B_D29
60
62 DDR_B_DQS#3
64
DDR_B_DQS3
66
68
DDR_B_D30
70
DDR_B_D31
72
74 DDRB_CKE1_DIMMB
DDRB_CKE1_DIMMB <6>
76
78 DDR_B_MA15
80 DDR_B_MA14
82
84 DDR_B_MA11
86 DDR_B_MA7
88
90 DDR_B_MA6
92 DDR_B_MA4
94
96 DDR_B_MA2
98 DDR_B_MA0
100
102 SB_CLK_DDR1
SB_CLK_DDR1 <6>
104
SB_CLK_DDR#1
SB_CLK_DDR#1 <6>
+1.5V
106
108
DDR_B_BS1
DDR_B_BS1 <6>
110
DDR_B_RAS#
DDR_B_RAS# <6>
112
114 DDRB_CS0_DIMMB#
DDRB_CS0_DIMMB# <6>
116 SB_ODT0
SB_ODT0 <6>
118
120 SB_ODT1
SB_ODT1 <6>
122
124
126 +VREF_CB
128
130 DDR_B_D36
132 DDR_B_D37
134
1 1
136
138
140 DDR_B_D38
2 2
142 DDR_B_D39
144
146 DDR_B_D44
148 DDR_B_D45
150
152
DDR_B_DQS#5
154
DDR_B_DQS5
156
158
DDR_B_D46
160 DDR_B_D47
162
164 DDR_B_D52
166 DDR_B_D53
168
170
172
174 DDR_B_D54
176 DDR_B_D55
178
180 DDR_B_D60
182 DDR_B_D61
184
186 DDR_B_DQS#7
188 DDR_B_DQS7
190
192 DDR_B_D62
194
DDR_B_D63
196
198
200
D_CK_SDATA
D_CK_SDATA <11,14,30>
202
D_CK_SCLK
D_CK_SCLK <11,14,30>
204
+0.75VS
206
208
Channel B
Security Classification Security Classification Security Classification
2011/11/22 2011/11/22 2011/11/22
Issued Date Issued Date Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
R65
1K_0402_1%
R66
1K_0402_1%
Compal Secret Data Compal Secret Data Compal Secret Data
2012/11/22 2012/11/22 2012/11/22
Deciphered Date Deciphered Date Deciphered Date
D
E
Compal Electronics, Inc. Compal Electronics, Inc. Compal Electronics, Inc.
Title Title Title
DDRIII DIMMB DDRIII DIMMB DDRIII DIMMB
Size Size Size Document Number Document Number Document Number Rev Rev Rev
Custom Custom Custom 1.0 1.0 1.0
Q1VZC M/B LA-8941P Schematic Q1VZC M/B LA-8941P Schematic Q1VZC M/B LA-8941P Schematic
Date: Date: Date: Friday, April 20, 2012 Friday, April 20, 2012 Friday, April 20, 2012 Sheet Sheet Sheet 12 12 12 of of of 45 45 45
E
1
2
3
4