Acer Q1VZC Schematics Document page 13

A
RTCRST close RAM door J1
1
R74
+RTCVCC
C163 @ 0_0603_5%
1U_0603_10V6K
2
1 2 PCH_RTCRST#
R75 20K_0402_5%
1 2 PCH_SRTCRST#
R76 20K_0402_5%
1
R77
1
C164 @ 0_0603_5%
1U_0603_10V6K
2
+RTCVCC
R78 1 2 1M_0402_5% SM_INTRUDER#
R79 1 2 330K_0402_5% PCH_INTVRMEN
INTVRMEN
H I ntegrated VRM enable
* ： ： ： ：
L I ntegrated VRM disable
： ： ： ：
(INTVRMEN should always be pull high.)
+3VS
R82 1 @ 2 1K_0402_5% PCH_SPKR
HIGH= Enable ( No Reboot)Disable TCO timer system reboot feature
* LOW= Disable (Default internal PD)
11/30 Add (EMI request)
+VCCSUS3_3
R84
2
1K_0402_5%
2 1 HDA_SDOUT_PCH
@
R83
0_0402_5%
2 1
<29> HDA_SDO
22P_0402_50V8J
HDA_SDO
ME debug mode,this signal has a weak internal PD
Low = Disabled (Default)
*
High = Enabled [Flash Descriptor Security Overide]
+VCCSUS3_3
R87 2 1 1K_0402_5% HDA_SYNC_PCH
This signal has a weak internal pull-down
On Die PLL VR Select is supplied by
1.5V when sampled high
*
1.8V when sampled low
Needs to be pulled High for Huron River platfrom
R88
33_0402_5%
1 2
HDA_BITCLK_PCH
<31> HDA_BITCLK_AUDIO
R89
33_0402_5%
1 2
3 HDA_SYNC_PCH_R
<31> HDA_SYNC_AUDIO
R92
33_0402_5%
1 2 HDA_RST_PCH#
<31> HDA_RST_AUDIO#
R95
33_0402_5%
1 2 HDA_SDOUT_PCH
<31> HDA_SDOUT_AUDIO
PCH_RTCX1
1 2 PCH_RTCX2
+3VS
R107 10M_0402_5%
4
Y1
1 2
32.768KHZ_12.5PF_1TJF125DP1A000D
12/7 Change symbol of U18 from SA00000XT00 to SA000041O00
1 1
C168
C167 18P_0402_50V8J
2 2
A
B
U16 3/7 Add
BD82HM70
HM70@
SA00005MQ60
PCH_RTCX1
PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
HDA_BITCLK_AUDIO
PCH_INTVRMEN
1
C467
HDA_BITCLK_PCH
2
@
HDA_SYNC_PCH
PCH_SPKR
<31> PCH_SPKR
HDA_RST_PCH#
HDA_SDIN0
<31> HDA_SDIN0
Prevent back drive issue.
+5VS
HDA_SDOUT_PCH
Q4
BSS138_NL_SOT23-3
3 1
HDA_SYNC_PCH
R91
R90 51_0402_5%
1 2 2 1
PCH_JTAG_TCK
@ 0_0402_5%
PAD T9 @ PCH_JTAG_TMS
R93
PAD T10 @ PCH_JTAG_TDI
1M_0402_5%
PAD T11 @ PCH_JTAG_TDO
R96
PCH_SPI_CLK_2 2 1 33_0402_5%
R98
PCH_SPI_CLK_1 2 1 33_0402_5% PCH_SPI_CLK
R100
PCH_SPI_CS0#_1 2 1 33_0402_5% PCH_SPI_CS0#
R101
PCH_SPI_CS1#_2 2 1 33_0402_5% PCH_SPI_CS1#
R103
PCH_SPI_MOSI_2 2 1 33_0402_5%
PCH_SPI_MOSI_1 2 1 33_0402_5% PCH_SPI_MOSI
R104
PCH_SPI_MISO_1 2 1 PCH_SPI_MISO
R105 33_0402_5%
2 1
PCH_SPI_MISO_2
R106 33_0402_5%
U17
PCH_SPI_CS0#_1 1
CS#
R109 1 2 3.3K_0402_5% SPI_WP1# 3
WP#
R108 1 2 3.3K_0402_5% SPI_HOLD1# 7
HOLD#
4
GND
SPI ROM FOR ME (4MB)
MX25L3206EM2I-12G_SO8
Footprint 200mil
SA000041P00
+3VS
+3VS
U18
PCH_SPI_CS1#_2 1 8
CS# VCC
R111 PCH_SPI_MISO_2 2 7
SO HOLD#
1 2 3.3K_0402_5% SPI_WP2# 3 6 PCH_SPI_CLK_2
WP# SCLK
4 5 PCH_SPI_MOSI_2
GND SI
SPI ROM FOR ME (1MB)
MX25L8006EM2I-12G_SO8
Footprint 200mil
SA000041O00
B
C
U16A
A20 C38 LPC_AD0
RTCX1 FWH0 / LAD0
A38 LPC_AD1
FWH1 / LAD1
C20 B37 LPC_AD2
RTCX2 FWH2 / LAD2
C37 LPC_AD3
FWH3 / LAD3
D20
RTCRST#
D36 LPC_FRAME#
FWH4 / LFRAME#
G22
SRTCRST#
E36
LDRQ0#
K22 K36 PCH_GPIO23
INTRUDER# LDRQ1# / GPIO23
C17 V5 SERIRQ
INTVRMEN SERIRQ
AM3
SATA0RXN
N34 AM1
HDA_BCLK SATA0RXP
AP7
SATA0TXN
L34 AP5
HDA_SYNC SATA0TXP
T10 AM10
SPKR SATA1RXN
AM8
SATA1RXP
K34 AP11
HDA_RST# SATA1TXN
AP10
SATA1TXP
12/1 Del
E34 AD7
HDA_SDIN0 SATA2RXN
AD5
SATA2RXP
G34 AH5
HDA_SDIN1 SATA2TXN
AH4
SATA2TXP
C34
HDA_SDIN2
AB8
SATA3RXN
A34 AB10
HDA_SDIN3 SATA3RXP
AF3
SATA3TXN
AF1
SATA3TXP
A36
HDA_SDO
Y7
SATA4RXN
Y5
SATA4RXP
C36 AD3
HDA_DOCK_EN# / GPIO33 SATA4TXN
AD1
SATA4TXP
N32
HDA_DOCK_RST# / GPIO13
Y3
SATA5RXN
Y1
SATA5RXP
AB3
SATA5TXN
J3 AB1
JTAG_TCK SATA5TXP
H7 Y11 L=500mil S=15mil
JTAG_TMS SATAICOMPO
K5 Y10 SATA_COMP
JTAG_TDI SATAICOMPI
H1
JTAG_TDO
AB12 L=500mil S=15mil
SATA3RCOMPO
AB13 SATA3_COMP
SATA3COMPI
T3 AH1 RBIAS_SATA3
SPI_CLK SATA3RBIAS
Y14
SPI_CS0#
T1
SPI_CS1#
P3 PCH_SATALED#
SATALED#
V4 V14 PCH_GPIO21
SPI_MOSI SATA0GP / GPIO21
U3 P1 PCH_GPIO19
SPI_MISO SATA1GP / GPIO19
COUGARPOINT_FCBGA989
HM77@
Reserve for EMI
+3VS
8 PCH_SPI_CLK 1 2
VCC
6 PCH_SPI_CLK_1 33_0402_5% @ R110
SCLK
5 PCH_SPI_MOSI_1
SI
2 PCH_SPI_MISO_1
SO
PCH_SPI_CLK_1 1 2
33_0402_5% @ R466
PCH_SPI_CLK_2 1 2
33_0402_5% @ R467
+3VS
R112 Security Classification Security Classification Security Classification
SPI_HOLD2# 1 2
2011/11/22 2011/11/22 2011/11/22
3.3K_0402_5%
Issued Date Issued Date Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
+RTCBATT
20mil
D1
BAS40-04_SOT23-3
+RTCVCC
20mil
+CHGRTC
1
C165 20mil
0.1U_0402_16V4Z
2
LPC_AD0 <29,30>
LPC_AD1 <29,30>
LPC_AD2 <29,30>
LPC_AD3 <29,30>
LPC_FRAME# <29,30>
SERIRQ <29,30>
SATA_PRX_DTX_N0 <24>
SATA_PRX_DTX_P0 <24>
HDD1
SATA_PTX_DRX_N0 <24>
SATA_PTX_DRX_P0 <24>
HM70 not support
SATA for port1/port3
+1.05VS_VTT
1 2
R94 37.4_0402_1%
+1.05VS_VTT
1 2
R97 49.9_0402_1%
1 2
R99 750_0402_1%
No use PU 10K +3VS
GPIO19 has internal Pull up
C166
10P_0402_50V8J
1 2
@
11/30 Add
22P_0402_50V8J
1 2 C465
@
22P_0402_50V8J
1 2 C466
@
Compal Secret Data Compal Secret Data Compal Secret Data
2012/11/22 2012/11/22 2012/11/22
Deciphered Date Deciphered Date Deciphered Date
D
E
+3VS
SERIRQ R80 2 1 10K_0402_5%
PCH_SATALED# R81 2 1 10K_0402_5%
+3VS
+3VS
R85
R230 10K_0402_5%
10K_0402_5%
PCH_GPIO21
PCH_GPIO23
R86
R234 10K_0402_5% @
1K_0402_5%
@
+3VS
R102
4.7K_0402_5%
PCH_GPIO19
Debug Port DG 1.2 PU 4.7K +3VS
Boot BIOS Strap
Boot BIOS GPIO51 GPIO19
LPC 0 0
Reserved 0 1
- 1 0
* SPI 1 1
Compal Electronics, Inc. Compal Electronics, Inc. Compal Electronics, Inc.
Title Title Title PCH (1/9) SATA,HDA,SPI, LPC, XDP PCH (1/9) SATA,HDA,SPI, LPC, XDP PCH (1/9) SATA,HDA,SPI, LPC, XDP
Size Size Size Document Number Document Number Document Number Rev Rev Rev
Custom Custom Custom 1.0 1.0 1.0
Q1VZC M/B LA-8941P Schematic Q1VZC M/B LA-8941P Schematic Q1VZC M/B LA-8941P Schematic
Date: Date: Date: Friday, April 20, 2012 Friday, April 20, 2012 Friday, April 20, 2012 Sheet Sheet Sheet 13 13 13 of of of 45 45 45
E
1
2
3
4