Peg Port Configuration - Avalue Technology EMX-C246P User Manual

Intel 8/9th generation core processor mini itx motherboard with intel c246 chipset
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3.6.3.1.4 PEG Port Configuration

Item
Enable Root Port
Max Link Speed
Max Link Width
ASPM
PEG0 (PCIEX1) Max Payload size
Program PCIe ASPM after OpROM
Option
Disabled
Enabled
Enable or Disable the Root Port.
Auto[Default]
Auto[Default]
Gen1
Configure PEG 0:1:0 Max Speed
Gen2
Gen3
Auto[Default]
Force X1
Force X2
Force PEG link to retrain to X1/2/4/8
Force X4
Force X8
Disabled
Auto[Default]
Control ASPM support for the PEG0. This
ASPM L0s
has no effect if PEG is not the currently
ASPM L1
active device.
ASPM L0sL1
Auto[Default]
Select PEG0 Max Payload size; Choose
128
Auto(Default Device Capability) or force to
256 TLP
128/256 Bytes
Enabled: PCIe ASPM will be Programmed
Disabled[Default]
after OpROM. Disabled: PCIe ASPM will be
Enabled
Programmed before OpROM.
User's Manual
Description
EMX-C246P User's Manual 59

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