Spi Interface - Quectel NB-IoT Module Series Hardware Design

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Please visit vendors' websites to select a suitable RS-232 transceiver, such as: http://www.exar.com and
http://www.maximintegrated.com.
NOTES
1.
Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps.
"
" represents the test point of UART interfaces. It is also recommended to reserve the test points of
2.
VBAT and PWRKEY, for convenient firmware upgrade and debugging when necessary.

3.9. SPI Interface

BC66 provides one SPI master interface. The following table shows the pin definition of SPI interface.
Table 10: Pin Definition of SPI Interface
Pin Name
Pin No.
SPI_MISO
3
SPI_MOSI
4
SPI_SCLK
5
SPI_CS
6
The module provides a 1.8V SPI interface. A level translator between the module and host should be
used if the application is equipped with a 3.3V processor or device interface. A voltage level translator that
supports SPI data rate is recommended. The following figure shows a reference design.
Module
VDD_EXT
CS_SPI
SCLK_SPI
MISO_SPI
MOSI_SPI
Figure 18: SPI Interface Reference Circuit with Translator Chip
BC66_Hardware_Design
I/O
Description
DI
Master input and slave output of SPI interface
DO
Master output and slave input of SPI interface
DO
Clock signal of SPI interface
DO
Chip selection of SPI interface
VCCA
0.1uF
OE
A1
A2
A3
A4
VCCB
0.1uF
GND
B1
Translator
B2
B3
B4
NB-IoT Module Series
BC66 Hardware Design
Comment
1.8V power domain
DTE
VDD
CS_SPI
SCLK_SPI
MOSI_SPI
MISO_SPI
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