Spectrum Digital TMS320LF2407 Technical Reference page 25

Spectrum Digital, Inc
2.7 JTAG Interface.
The TMS320LF2407 Evaluation Module is supplied with a 14 pin header interface, P5.
This is the standard interface used by JTAG emulators to interface to Texas
Instruments DSPs. The pinout for the connector is shown below:
TMS
TDI
PD (+5V)
TDO
TCK-RET
TCK
EMU0
2.8 Logging Interface
The TMS320LF2407 has an on board SPI data logger interface which is compatible
with the Spectrum Digital SPI515 emulator. This interface allows high speed data
transfer logging using the LF2407's SPI port. The pin out for this connector is shown in
the table below.
Pin #
To direct the SPI port to the data logging interface jumper JP4 needs to be set to the
2-3 position.
2-14
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1 2 TRST-
3 4 GND
5 6 no pin (key)
7 GND
8
9 GND
10
11 GND
12
13 EMU1
14
Figure 2-6, JTAG Connector Pinout
Table 6: Logging Interface
Signal
1 STE
3 SPI Dataout
5 SPICLK
7 SPI Data In
9 NC
TMS320LF2407 Evaluation Module Technical Reference
Header Dimensions
Pin-to-Pin spacing, 0.100 in. (X,Y)
Pin width, 0.025-in. square post
Pin length, 0.235-in. nominal
Pin # Signal
2 GND
4 GND
6 GND
8 GND
10 GND