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From the External
Connector Encoder
Input Pins
© National Instruments Corporation
Encoder Input Circuit
Figure 5-7 shows a simplified schematic diagram of the circuit used for
the Phase A, Phase B, and Index encoder inputs. Both Phases A and B are
required for proper encoder counter operation, and the signals must support
the 90° phase difference within system tolerance. The encoder and Index
signals are conditioned by a software-programmable digital filter inside
the FPGA. The Index signal is optional but highly recommended and
required for initialization functionality with the Find Index function.
Vcc
3.3 kΩ
1 kΩ
1/8 W
Trigger Inputs, Shutdown Input, and
Breakpoint Outputs
The PCI-7342 controller offers additional high-performance features in the
encoder FPGA. The encoder channels have high-speed position capture
trigger inputs and breakpoint outputs. These signals are useful for
high-speed synchronization of motion with actuators, sensors, and other
parts of the complete motion system:
•
Trigger Input <1..2>—When enabled, an active transition on a
high-speed position capture input causes instantaneous position
capture (<100 ns latency) of the corresponding encoder count value.
You can use this high-speed position capture functionality for
applications ranging from simple position tagging of sensor data
to complex camming systems with advance/retard positioning and
registration.
The polarity of the trigger input is programmable in software as
active-low (inverting) or active-high (non-inverting), rising or falling
edge. You can also use a trigger input as a latching general-purpose
digital input by simply ignoring the captured position.
•
Shutdown Input—When enabled in software, the shutdown input
signal can be used to kill all motion by asserting the controller inhibits,
setting the analog outputs to 0 V, and stopping any stepper pulse
74HC244
DGND
Figure 5-7. Encoder Input Circuit
5-11
Chapter 5
Signal Connections
To the Quadrature
Decoder Circuit
NI PCI-7342 Hardware User Manual
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