Related Manuals for Texas Instruments ADS5102 EVM
Summary of Contents for Texas Instruments ADS5102 EVM
- Page 1 ADS5102/3 EVM User’s Guide December 2001 AAP High-Speed Data Converter (Dallas) SLAU077...
- Page 2 Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
- Page 3 EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms...
- Page 4 EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Copyright 2001, Texas Instruments Incorporated Mailing Address: Texas Instruments Post Office Box 655303...
- Page 5 About This Manual This user’s guide is to assist the user with the operation of the EVM using the ADS5102/3 devices. How to Use This Manual This document contains the following chapters: Chapter 1—Overview Chapter 2—Physical Description Chapter 3—Circuit Description Information About Cautions and Warnings This book may contain cautions and warnings.
- Page 6 Contents FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference.
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Page 7: Table Of Contents
Overview ............... . Purpose . - Page 8 Contents Tables 1–1 Two Pin Jumper List ............1–2 Three Pin Jumper List .
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Page 9: Overview
This user’s guide gives a general overview of the ADS5102/3 evaluation module (EVM) and provides a general description of the features and functions to be considered while using this module. Topic Purpose ............EVM Basic Functions . -
Page 10: Evm Basic Functions
Purpose 1.1 Purpose The ADS5102/3 EVM provides a platform for evaluating the ADS5102/3 analog-to-digital converter (ADC) under various signal, reference, and supply conditions. Use this document in combination with the EVM schematic diagram supplied. 1.2 EVM Basic Functions Analog input to the ADC is provided via two external SMA connectors. The single-ended input the user provides is converted into a differential signal at the input of the device. -
Page 11: Ads5102/3 Evm Operational Procedure
1.4 ADS5102/3 EVM Operational Procedure The ADS5102/3 EVM provides a flexible means of evaluating the ADS5102/3 in a number of modes of operation. A basic setup procedure that can be used as a board confidence check is as follows: 1) Verify all jumper settings against the schematic jumper list in Table 1–1 and Table 1–2: Table 1–1. - Page 12 ADS5102/3 EVM Operational Procedure 3) Switch power supplies on. 4) Use a function generator with 50- output to input a 40-MHz, 1.5-V offset, (p-p) Note: The frequency of the clock must be within the specification for the device speed grade. 5) Use a function generator with 50- output to input a 1.5-V offset, 3-V amplitude square wave signal into J4 to be used as the buffered output clock.
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Page 13: Physical Description
Physical Description This chapter describes the physical characteristics and PCB layout of the EVM and lists the components used on the module. Topic PCB Layout ..........Bill of Materials . -
Page 14: Pcb Layout
PCB Layout 2.1 PCB Layout The EVM is constructed on a 4-layer, 104 mm (4.1 inch) x 114 mm (4.5 inch) x 1,57 mm (0.062 inch) thick PCB using FR–4 material. Figure 2–1 through Figure 2–4 show the individual layers. Figure 2–1. -
Page 15: Inner Layer 1, Ground Plane
PCB Layout Figure 2–2. Inner Layer 1, Ground Plane Physical Description... -
Page 16: Inner Layer 2, Power Plane
PCB Layout Figure 2–3. Inner Layer 2, Power Plane... -
Page 17: Bill Of Materials
Figure 2–4. Bottom Layer 2.2 Bill of Materials Table 2–1 lists the parts used in constructing the EVM. Table 2–1. Bill of Materials Description 47 F, tantalum, 10%, 10 V 0.1 F,16 V, 10% capacitor 10 F, 10 V, 10% capacitor 0.01 F, 50 V,10% capacitor 1.0 F, 10 V, 10% capacitor 22 pF, 50 V, 5%, capacitor... - Page 18 Bill of Materials Table 2–1. Bill of Materials (Continued) Description 470 pF,16 V, 10% capacitor 2.2 F,16 V, 10% capacitor Ferrite bead 499- resistor, 1/16 W, 1% 523- resistor, 1/16 W, 1% 49.9- resistor, 1/16 W, 1% 1-k resistor, 1/16 W, 1% 2.49-k resistor, 1/16 W, 1% 475- resistor, 1/16 W, 1% 953- resistor, 1/16 W, 1%...
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Page 19: Circuit Description
This chapter describes the circuit function and shows the schematic for the EVM. Topic Circuit Function ..........Schematic Diagram . -
Page 20: Circuit Function
Circuit Function 3.1 Circuit Function The following paragraphs describe the function of the individual circuits. See the data sheet for device operating characteristics. 3.1.1 Analog Inputs The ADC has either transformer-coupled inputs or differential-amplifier inputs from a single-ended source. The inputs are provided via the SMA connectors J1 and J2 on the EVM, which must be configured as follows: For a differential amplifier input to the ADC, a single ended source is connected to J1. -
Page 21: Clock Inputs
The following paragraphs describe the function of the individual circuits. See the data sheet for device operating characteristics. 3.1.3 Clock Inputs The EVM provides separate inputs for the ADC clock and output buffer clock. This allows the user to send a modified version of the ADC clock (inverted, delayed, etc.) with the output data to generate the required setup and hold times for the user interface. -
Page 22: Schematic Diagram
Schematic Diagram Table 3–2. Output Connector J15 J15 Pin 3.2 Schematic Diagram The following figures show the schematic diagram for the EVM. Description J15 Pin Output clock Data Bit 9 (MSB) Data Bit 8 Data Bit 7 Description Data Bit 6 Data Bit 5 Data Bit 4 Data Bit 3... - Page 23 1.8 pF THS4141 VOUT- VOCM VOUT+ 49.9 0.01 uF 0.1 uF 1.8 pF 0.1 uF 49.9 T1-1T-KK81_XFMR 470 pF 0.1 uF 0.001 uF EXTERNAL_CML EXTERNAL_CML Note 1. Part not installed Note 2. For ADS5101, R51= 3.8K For ADS5102, R51= 4.42K For ADS5103, R51= 8.25K +5VA 470 pF...
- Page 24 +5VA +2.5V 10 uF 2.2 uF 1 uF BYPASS TPS79225 .01 uF +5VA 0.1 uF 470 pF OPA4227UA -5VA 10 uF 0.1 uF 470 pF 0.1 uF 2.49K 49.9 0.1% 0.1 uF OPA4227UA 10 uF 0.047 uF 0.1 uF OPA4227UA 10 uF OPA4227UA REFT...
- Page 25 ADC Analog Supply (+1.8V) +1.8VA-PS AVDD BANANA_JACK 47 uF 10 uF 0.1 uF 0.1 uF BANANA_JACK ADC Digital Supply (+1.8V) +1.8VD-PS DVDD BANANA_JACK 47 uF 10 uF 0.1 uF 0.1 uF BANANA_JACK ADC Driver Supply (+1.8V/3.3v) +1.8V/+3.3VD-PS DRVDD BANANA_JACK 47 uF 10 uF 0.1 uF 0.1 uF...
- Page 26 DRVDD 0.1 uF DATA OUT 40PIN_IDC Note 1. Part not installed 0.1 uF 0.1 uF 0.1 uF DRVDD ADC_CLK (Note 1) (Note 1) /OE1 /OE2 /OE3 /OE4 49.9 NC_D01 NC_D01 NC_D00 NC_D00 SN74AVC16244DGG ADC_CLK OUTPUT CLOCK Title: J. SETON Engineer: DOCUMENTCONTROL # Y.DEWONCK Drawn By:...
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