Texas Instruments ADS1274 Manual
Texas Instruments ADS1274 Manual

Texas Instruments ADS1274 Manual

Quad/octal, simultaneous sampling, 24-bit analog-to-digital converters

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Quad/Octal, Simultaneous Sampling, 24-Bit Analog-to-Digital Converters
FEATURES
1
• Simultaneously Measure Four/Eight Channels
234
Up to 144kSPS Data Rate
AC Performance:
70kHz Bandwidth
111dB SNR (High-Resolution Mode)
–108dB THD
DC Accuracy:
0.8μV/°C Offset Drift
1.3ppm/°C Gain Drift
Selectable Operating Modes:
High-Speed: 144kSPS, 106dB SNR
High-Resolution: 52kSPS, 111dB SNR
Low-Power: 52kSPS, 31mW/ch
Low-Speed: 10kSPS, 7mW/ch
Linear Phase Digital Filter
SPI™ or Frame-Sync Serial Interface
Low Sampling Aperture Error
Modulator Output Option (digital filter bypass)
Analog Supply: 5V
Digital Core: 1.8V
I/O Supply: 1.8V to 3.3V
APPLICATIONS
Vibration/Modal Analysis
Multi-Channel Data Acquisition
Acoustics/Dynamic Strain Gauges
Pressure Sensors
VREFP VREFN
Input1
DS
Input2
DS
Input3
DS
Input4
DS
AGND
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments, Inc.
2
SPI is a trademark of Motorola, Inc.
3
All other trademarks are the property of their respective owners.
4
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Check for Samples: ADS1274,
AVDD
DVDD
IOVDD
SPI
DRDY/FSYNC
and
SCLK
Four
Frame-
Digital
DOUT[4:1]
Sync
Filters
DIN
Interface
TEST[1:0]
FORMAT[2:0]
CLK
Control
SYNC
Logic
PWDN[4:1]
CLKDIV
MODE[1:0]
DGND
ADS1274
SBAS367F – JUNE 2007 – REVISED FEBRUARY 2011
ADS1278
DESCRIPTION
Based on the single-channel ADS1271, the ADS1274
(quad) and ADS1278 (octal) are 24-bit, delta-sigma
(ΔΣ) analog-to-digital converters (ADCs) with data
rates up to 144k samples per second (SPS), allowing
simultaneous sampling of four or eight channels. The
devices are offered in identical packages, permitting
drop-in expandability.
Traditionally, industrial delta-sigma ADCs offering
good drift performance use digital filters with large
passband droop. As a result, they have limited signal
bandwidth
and
are
measurements.
High-resolution
applications offer larger usable bandwidths, but the
offset and drift specifications are significantly weaker
than respective industrial counterparts. The ADS1274
and ADS1278 combine these types of converters,
allowing high-precision industrial measurement with
excellent dc and ac specifications.
The
high-order,
chopper-stabilized
achieves very low drift with low in-band noise. The
onboard decimation filter suppresses modulator and
signal out-of-band noise. These ADCs provide a
usable signal bandwidth up to 90% of the Nyquist
rate with less than 0.005dB of ripple.
Four operating modes allow for optimization of speed,
resolution, and power. All operations are controlled
directly by pins; there are no registers to program.
The devices are fully specified over the extended
industrial range (–40°C to +105°C) and are available
in an HTQFP-64 PowerPAD™ package.
VREFP VREFN AVDD
DVDD
Input1
DS
SPI
and
Input2
DS
Frame-
Sync
Input3
DS
Interface
Input4
Eight
DS
Digital
Input5
DS
Filters
Control
Input6
DS
Logic
Input7
DS
Input8
DS
AGND
DGND
ADS1278
© 2007–2011, Texas Instruments Incorporated
ADS1274
ADS1278
mostly
suited
for
ADCs
in
audio
modulator
IOVDD
DRDY/FSYNC
SCLK
DOUT[8:1]
DIN
TEST[1:0]
FORMAT[2:0]
CLK
SYNC
PWDN[8:1]
CLKDIV
MODE[1:0]
dc

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Summary of Contents for Texas Instruments ADS1274

  • Page 1 Quad/Octal, Simultaneous Sampling, 24-Bit Analog-to-Digital Converters Check for Samples: ADS1274, ADS1278 FEATURES DESCRIPTION • Simultaneously Measure Four/Eight Channels Based on the single-channel ADS1271, the ADS1274 (quad) and ADS1278 (octal) are 24-bit, delta-sigma • Up to 144kSPS Data Rate (ΔΣ) analog-to-digital converters (ADCs) with data •...
  • Page 2: Absolute Maximum Ratings

    SBAS367F – JUNE 2007 – REVISED FEBRUARY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
  • Page 3: Electrical Characteristics

    = 37MHz max for High-Speed mode, and 27MHz max for all other modes. See Table 7 for f restrictions in High-Speed mode. (3) SPS = samples per second. (4) Best fit method. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 4 (7) THD includes the first nine harmonics of the input signal; Low-Speed mode includes the first five harmonics. (8) f = 37MHz max for High-Speed mode, and 27MHz max for all other modes. See Table 7 for V restrictions in High-Speed mode. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 5 Low-Power mode Low-Speed mode (9) f = 37MHz max for High-Speed mode, and 27MHz max for all other modes. See Table 7 for DVDD restrictions in High-Speed mode. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 6 (PowerPAD Outline) DOUT6 MODE0 DOUT5 MODE1 (1) Boldface pin names indicate additional pins for the ADS1278; see Table Table 1. ADS1274/ADS1278 PIN DESCRIPTIONS NAME FUNCTION DESCRIPTION 6, 43, 54, AGND Analog ground Analog ground; connect to DGND using a single plane.
  • Page 7 ADS1274 ADS1278 www.ti.com SBAS367F – JUNE 2007 – REVISED FEBRUARY 2011 Table 1. ADS1274/ADS1278 PIN DESCRIPTIONS (continued) NAME FUNCTION DESCRIPTION AINN1 Analog input AINN2 Analog input AINN3 Analog input ADS1278: AINN[8:1] Negative analog input, channels 8 through 1. AINN4 Analog input...
  • Page 8 Under equal conditions, with DOUT connected directly to DIN, the timing margin is > 4ns. (6) DOUT1, TDM mode, IOVDD = 3.15V to 3.45V, and DVDD = 1.7V to 1.9V. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 9 (5) DOUT1, TDM mode, IOVDD = 3.15V to 3.45V, and DVDD = 2V to 2.2V. (6) DOUT1, TDM mode, IOVDD = 3.15V to 3.45V, and DVDD = 1.7V to 1.9V. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 10: Typical Characteristics

    = 1kHz, 0.5dBFS f = 1kHz, 20dBFS 32,768 Points 32,768 Points -100 -100 -120 -120 -140 -140 -160 -160 100k 100k Frequency (Hz) Frequency (Hz) Figure 5. Figure 6. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 11 Low-Power Mode Low-Power Mode Shorted Input Shorted Input 262,144 Points 262,144 Points -100 -120 -140 -160 -180 100k Frequency (Hz) Output ( V) Figure 11. Figure 12. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 12 High-Speed Mode V = 0.5dBFS f = 1kHz THD+N THD+N -100 -100 -120 -120 -140 -140 100k -120 -100 Frequency (Hz) Input Amplitude (dBFS) Figure 17. Figure 18. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 13 INPUT AMPLITUDE Low-Speed Mode Low-Speed Mode V = 0.5dBFS THD+N THD+N -100 -100 -120 -120 -140 -140 -120 -100 Frequency (Hz) Input Amplitude (dBFS) Figure 23. Figure 24. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 14 Figure 25. Figure 26. OFFSET WARMUP DRIFT RESPONSE BAND GAIN WARMUP DRIFT RESPONSE BAND ADS1278 High-Speed and High-Resolution Modes ADS1274/78 High-Speed and High-Resolution Modes ADS1278 Low-Power Mode ADS1278 Low-Power Mode ADS1278 Low-Speed Mode ADS1278 Low-Speed Mode ADS1274 High-Speed and High-Resolution Modes...
  • Page 15 -300 -100 120 125 Temperature ( C) ° VCOM Voltage Output (V) Figure 33. Figure 34. ADS1274/ADS1278 ADS1274 REFERENCE INPUT DIFFERENTIAL SAMPLING MATCH ERROR HISTOGRAM IMPEDANCE vs TEMPERATURE 1.36 13.6 30 units over 3 production lots, inter-channel combinations. 1.34 13.4 1.32...
  • Page 16 T = 40 C ° T = +125 C ° -124 Electrical Characteristics Operating Range. -128 -2.5 -2.0 -1.5 -1.0 -0.5 V (V) Figure 41. Figure 42. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 17 POWER-SUPPLY REJECTION vs INPUT FREQUENCY vs POWER-SUPPLY FREQUENCY AVDD DVDD -100 -100 IOVDD -120 -120 100k 100k Input Frequency (Hz) Power-Supply Modulation Frequency (Hz) Figure 47. Figure 48. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 18 High-Speed Mode High-Speed and High-Resolution Modes High-Resolution Mode Low-Power Mode Low-Power Mode Low-Speed Mode Low-Speed Mode 120 125 120 125 Temperature (°C) Temperature (°C) Figure 53. Figure 54. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 19 High-Speed Mode High-Resolution Mode Low-Power Mode Low-Power Mode Low-Speed Mode High-Resolution Mode Low-Speed Mode 120 125 120 125 Temperature (°C) Temperature ( C) ° Figure 55. Figure 56. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 20 CLKDIV Modulator4/8 Filter4/8 AINN4/8 MODE[1:0] AGND DGND (1) The ADS1274 has four channels; the ADS1278 has eight channels. Figure 57. ADS1274/ADS1278 Block Diagram Table 2. Operating Mode Performance Summary MODE MAX DATA RATE (SPS) PASSBAND (kHz) SNR (dB) NOISE (μV...
  • Page 21: Functional Description

    The modulator samples the input signal together with sampling the The phase match of one 4-channel ADS1274 to that reference voltage to produce a 1s density output of another ADS1274 (eight or more channels total) stream.
  • Page 22 Low-Power, and Low-Speed Modes Table 4. Antialiasing Filter Order Image Rejection IMAGE REJECTION (dB) at f –3dB DATA ANTIALIASING FILTER ORDER HS, LP, LS Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 23 (128 × f ), as shown in DATA Figure 65. The stop band of the ADS1274/78 provides 100dB attenuation of frequencies that begin just beyond the passband and continue out to f Placing an antialiasing, low-pass filter in front of the ADS1274/78 inputs is recommended to limit possible 0.45...
  • Page 24: Phase Response

    (AVDD + 0.4V), ESD protection diodes on the inputs DATA FORMAT may turn on. If these conditions are possible, external The ADS1274/78 outputs 24 bits of data in twos Schottky clamp diodes or series resistors may be complement format. required to limit the input current to safe values (see Absolute Maximum Ratings table).
  • Page 25 VOLTAGE REFERENCE INPUTS (VREFP, VREFN) AVDD AGND The voltage reference for the ADS1274/78 ADC is the differential voltage between VREFP and VREFN: = (VREFP – VREFN). The voltage reference is AINP common to all channels. The reference inputs use a...
  • Page 26 MODE MAX f DATA RATE SELECTION (MHz) CLKDIV (SPS) performance from the ADS1274. Noise and drift on DATA High-Speed 144,531 the reference degrade overall system performance. See the Application Information section for example...
  • Page 27: Synchronization (Sync)

    FSYNC, t is stable. NDR-FS SYNCHRONIZATION (SYNC) Figure 74 for the Frame-Sync format timing requirement. The ADS1274/78 can be synchronized by pulsing the SYNC pin low and then returning the pin high. When After synchronization, indication valid data...
  • Page 28 (1) If SYNC is asynchronous to the FSYNC clock, then t varies from 127 to 128 conversions, starting from the rising edge of SYNC. If SYNC is made synchronous to the FSYNC clock, then t is stable. Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 29 TEST[1:0] input pins must be driven; all vacated data position (dynamic-position TDM data other input pins can float. The ADS1274/78 outputs mode). remain driven. In Discrete data format, the data are always forced to...
  • Page 30: Serial Interface Protocols

    Even though the SCLK input has hysteresis, it is recommended to keep SCLK as clean as possible to Data can be read from the ADS1274/78 with two prevent glitches from accidentally shifting the data. interface protocols (SPI or Frame-Sync) and several...
  • Page 31 Frame-Sync Timing Requirements. This input is used when multiple ADS1274/78s are to SCLK be daisy-chained together. It can be used with either SPI or Frame-Sync formats. Data are shifted in on The serial clock (SCLK) features a Schmitt-triggered the falling edge of SCLK.
  • Page 32 Figure 78. TDM Mode, Fixed-Position Data (Channels 1 and 3 Shown Powered Down) SCLK DOUT1 ADS1274 DOUT1 ADS1278 DRDY (SPI) FSYNC (Frame- Sync) Figure 79. TDM Mode, Dynamic Position Data (Channels 1 and 3 Shown Powered Down) Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 33: Daisy Chaining

    FSYNC (Frame-Sync) Figure 80. Discrete Data Output Mode DAISY-CHAINING Table 15. Maximum Channels in a Daisy-Chain SCLK Multiple ADS1274/78s can be daisy-chained together MAXIMUM NUMBER to output data on a single pin. The DOUT1 data MODE SELECTION CLKDIV OF CHANNELS...
  • Page 34 NOTE: The number of chained devices is limited by the SCLK rate and device mode. Figure 83. Segmented DOUT Daisy-Chain, Frame-Sync Protocol (FORMAT[2:0] = 011 or 100) Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 35: Power Supplies

    Modulator Data Channel 4/8 FORMAT1 DOUT4/8 FORMAT2 SCLK Modulator Clock Output 129 (max) DATA (1) The ADS1274 has four channels; the ADS1278 has eight DRDY (SPI Protocol) channels. DOUT Figure 85. Modulator Output (Frame-Sync Protocol) Valid Data (1) The power-supply reset thresholds are approximate.
  • Page 36 PIN TEST USING TEST[1:0] INPUTS output common-mode level of the analog input The test mode feature of the ADS1274 and ADS1278 drivers. The drive capability of the output is limited; allows continuity testing of the digital I/O pins. In this...
  • Page 37: Application Information

    Figure 88 Figure 90 illustrate basic connections 4. Analog/Digital Circuits: Place analog circuitry and interfaces that can be used with the ADS1274. (input buffer, reference) and associated tracks together, keeping them away from digital circuitry (DSP, microcontroller, logic). Avoid crossing digital tracks across analog tracks to reduce noise coupling and crosstalk.
  • Page 38 (3) Indicates COG ceramic capacitors. (4) Optional. For pin test mode. (5) U1: SN74LVC1G04; U2: SN74LVC2G74. These components re-clock the ADS1274/78 data output to interface to the TMS320VC5509. (6) If CLK > 32.768MHz, use the REF5020 and DVDD = 2.1V.
  • Page 39 (3) Alternate driver OPA1632 (using ±12V supplies). (3) Alternate driver OPA1632 (using ±12V supplies). Figure 89. Basic Differential Input Signal Figure 90. Basic Single-Ended Input Signal Interface Interface Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 40 Wire Bond Wire Bond Leadframe Die Pad Exposed at Base of Package Die Attach Epoxy (thermally conductive) Leadframe Figure 91. Cross-Section View of a PowerPAD Thermally-Enhanced Package Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 41 Before attempting a board layout with ground plane layer. The ground plane is used as a the ADS1274, it is recommended that the hardware heatsink in this application. It is very important that engineer and/or layout designer be familiar with the the thermal via diameter be no larger than 13mils in information contained in this document.
  • Page 42 Thermal Pad 40mils (1mm) 40mils (1mm) 118mils (3mm) 316mils (8mm) Thermal Via 13mils (0.33mm) 316mils (8mm) Figure 93. Thermal Pad Etch and Via Pattern for the HTQFP-64 Package Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 43: Revision History

    ) to SPI Format Timing Specification table ..........DOPD • Added supplemental timing requirements (t and t ) to Frame-Sync Format Timing Specification table ....DOPD MSBPD Submit Documentation Feedback © 2007–2011, Texas Instruments Incorporated Product Folder Link(s): ADS1274 ADS1278...
  • Page 44 Op Temp (°C) Device Marking Samples Drawing (4/5) ADS1274IPAPR ACTIVE HTQFP 1000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS1274 & no Sb/Br) ADS1274IPAPT ACTIVE HTQFP Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS1274 & no Sb/Br) ADS1274IPAPTG4 ACTIVE...
  • Page 45 PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
  • Page 46: Tape And Reel Information

    PACKAGE MATERIALS INFORMATION www.ti.com 14-Feb-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) ADS1274IPAPR HTQFP 1000 330.0 24.4 13.0 13.0 16.0 24.0 ADS1274IPAPT...
  • Page 47 PACKAGE MATERIALS INFORMATION www.ti.com 14-Feb-2019 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) ADS1274IPAPR HTQFP 1000 350.0 350.0 43.0 ADS1274IPAPT HTQFP 213.0 191.0 55.0 ADS1278IPAPR HTQFP 1000 350.0 350.0 43.0 ADS1278IPAPT HTQFP 213.0 191.0 55.0...
  • Page 50 www.ti.com...
  • Page 51 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated...

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