Texas Instruments ADS5410 EVM User Manual
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Texas Instruments ADS5410 EVM User Manual

Texas Instruments ADS5410 EVM User Manual

Aap high-speed data converter
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ADS5410 EVM
User's Guide
June 2002
AAP High-Speed Data Converter (Dallas)
SLAU082

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Summary of Contents for Texas Instruments ADS5410 EVM

  • Page 1 ADS5410 EVM User’s Guide June 2002 AAP High-Speed Data Converter (Dallas) SLAU082...
  • Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
  • Page 3 EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms...
  • Page 4 EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2001, Texas Instruments Incorporated...
  • Page 5 Information About Cautions and Warnings Preface Read This First About This Manual This user’s guide is to assist the user with the operation of the EVM using the ADS5410 devices. How to Use This Manual This document contains the following chapters: Chapter 1—Overview Chapter 2—Physical Description Chapter 3—Circuit Description...
  • Page 6 Contents FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference.

  • Page 7: Table Of Contents

    ............ADS5410 EVM Operational Procedure .
  • Page 8 Contents Tables 1–1 Two Pin Jumper List ............1–2 Three Pin Jumper List .

  • Page 9: Overview

    ......... . ADS5410 EVM Operational Procedure .

  • Page 10: Evm Basic Functions

    Purpose 1.1 Purpose The ADS5410 EVM provides a platform for evaluating the ADS5410 analog-to-digital converter (ADC) under various signal, reference, and supply conditions. Use this document in combination with the EVM schematic diagram supplied. 1.2 EVM Basic Functions Analog input to the ADC is provided via two external SMA connectors. The single-ended input the user provides is converted into a differential signal at the input of the device.

  • Page 11: Ads5410 Evm Operational Procedure

    ADS5410 EVM Operational Procedure 1.4 ADS5410 EVM Operational Procedure The ADS5410 EVM provides a flexible means of evaluating the ADS5410 in a number of modes of operation. A basic setup procedure that can be used as a board confidence check is as follows: 1) Verify all jumper settings against the schematic jumper list in Table 1–1...
  • Page 12 ADS5410 EVM Operational Procedure 5) Use a function generator with 50-Ω output to input a 1.5-V offset, 3-V (p-p) amplitude square wave signal into J4 to be used as the buffered output clock. Note: This signal must be the same frequency and synchronized with the ADC clock.

  • Page 13: Physical Description

    Chapter 2 Physical Description This chapter describes the physical characteristics and PCB layout of the EVM and lists the components used on the module. Topic Page PCB Layout ..........Bill of Materials .

  • Page 14: Pcb Layout

    PCB Layout 2.1 PCB Layout The EVM is constructed on a 4-layer, 104 mm (4.1 inch) x 114 mm (4.5 inch) x 1,57 mm (0.062 inch) thick PCB using FR–4 material. Figure 2–1 through Figure 2–4 show the individual layers. Figure 2–1.

  • Page 15: Inner Layer 1, Ground Plane

    PCB Layout Figure 2–2. Inner Layer 1, Ground Plane Physical Description...

  • Page 16: Inner Layer 2, Power Plane

    PCB Layout Figure 2–3. Inner Layer 2, Power Plane...

  • Page 17: Bottom Layer

    PCB Layout Figure 2–4. Bottom Layer Physical Description...

  • Page 18: Bill Of Materials

    Bill of Materials 2.2 Bill of Materials Table 2–1 lists the parts used in constructing the EVM. Table 2–1. Bill of Materials Description Part Number REF DES Not Installed 47 µF, 10 V, 10% tantalum ca- 10TPA47M Sanyo C72–C76 pacitor 0.1 µF, 16 V, 10% capacitor ECJ–1VB1C104K Panasonic...
  • Page 19 Bill of Materials Description Part Number REF DES Not Installed 0-Ω resistor, 1/16 W, 1% ERJ–3EKF0R00V Panasonic R36, R38, R40, R43, R44, R45, 1K Pot 3296Y–102 Bourns R27, R28, R29 Transformer ADT1–1WT Transformer T1–6T–KK81 Mini-Circuits SMA connectors 713–4339 Allied J1, J2, J3, J4, J12 (901–144–8RFX) Black test point 5011K...

  • Page 21: Circuit Description

    Chapter 3 Circuit Description This chapter describes the circuit function and shows the schematic for the EVM. Topic Page Circuit Function ..........Schematic Diagram .

  • Page 22: Circuit Function

    Circuit Function 3.1 Circuit Function The following paragraphs describe the function of the individual circuits. See data sheet for device operating characteristics. 3.1.1 Analog Inputs The ADC has either transformer-coupled inputs or differential-amplifier inputs from a single-ended source. The inputs are provided via the SMA connectors J1 and J2 on the EVM, which must be configured as follows: For a 1:1 transformer coupled input to the ADC, a single ended source is connected to J2.

  • Page 23: Control Inputs

    The following paragraphs describe the function of the individual circuits. See data sheet for device operating characteristics. 3.1.2.3 Buffer Clock To provide a clock to the output buffer, apply a clock input to J4. To provided the single-ended ADC clock to the output buffer do the following: 1) Insert R43 and R44.

  • Page 24: Schematic Diagram

    Schematic Diagram Table 3–1. Output Connector J15 J15 Pin Description J15 Pin Description Data bit 0 (LSB) Data bit 10 Data bit 1 Data bit 11 Data bit 2 Data bit 3 Data bit 4 Output clock Data bit 5 Data bit 6 Data bit 7 Data bit 8...
  • Page 25 Revision History ECN Number Approved AVDD +5VA 2 pF 0.01 uF 0.1 uF 0.01 uF 0.1 uF 0.01 uF 0.1 uF 470 pF 0.1 uF 0.1 uF 0.1 uF 0.01 uF 0.1 uF +VCC 0.01 uF 0.01 uF Note 1 49.9 VOUT- VOCM...
  • Page 26 DRVDD 0.1 uF 0.1 uF 0.1 uF 0.1 uF 0.1 uF 0.1 uF DRVDD (Note 1) BUFF CLOCK DRVDD SN74AVC16244DGG 49.9 (Note 1) /OE1 /OE2 ADC_CLK /OE3 ADC_CLK /OE4 OUTCLK BCLK 40PIN_IDC 12500 TI Boulevard. Dallas, Texas 75243 Title: ADS5410 Engineer: J.
  • Page 27 +5VA (Note 1) (Note 1) (Note 1) 5.62K (Note 1) 0.1 uF 470 pF (Note 1) (Note 1) (Note 1) (Note 1) (Note 1) OPA4227UA (Note 1) REFT (2.15V TYP) REFT 49.9 -5VA 0.1% 10 uF 0.1 uF (Note 1) (Note 1) 0.047 uF 2.0 K...
  • Page 28 Diff Driver +5V supply +5VA-PS +3.3VA-PS +5VA AVDD ADC Analog Supply (+3.3V) BANANA_JACK BANANA_JACK 47 uF 10 uF 0.1 uF 0.1 uF 47 uF 10 uF 0.1 uF 0.1 uF BANANA_JACK BANANA_JACK Diff Driver -5V supply ADC Digital Supply (+1.8V) -5VA-PS +1.8VD-PS -5VA...
  • Page 29 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments ADS5410EVM...

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