Texas Instruments DAC8554EVM User Manual
Texas Instruments DAC8554EVM User Manual

Texas Instruments DAC8554EVM User Manual

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This user's guide describes the characteristics, operation and use of the DAC8554
Evaluation Module (EVM). It covers all matters related to proper use and configuration
of this EVM along with the devices that it supports. The physical printed circuit board
(PCB) layout, schematic diagram and circuit descriptions are also included. For a more
detailed description of the DAC8554, please refer to the product datasheet available
from the Texas Instruments web site at
documents are listed in the section of this guide entitled Related Documentation from
Texas Instruments. Throughout this document, the acronym EVM and the phrases
evaluation module and demonstration board are synonymous with the DAC8554EVM.
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DAC8554EVM User's Guide
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User's Guide
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DAC8554EVM User's Guide
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Summary of Contents for Texas Instruments DAC8554EVM

  • Page 1: Table Of Contents

    Texas Instruments web site at http://www.ti.com. Additional support documents are listed in the section of this guide entitled Related Documentation from Texas Instruments. Throughout this document, the acronym EVM and the phrases evaluation module and demonstration board are synonymous with the DAC8554EVM. Contents .....................
  • Page 2: Overview

    Overview Overview This section gives a general overview of the DAC8554EVM and describes some of the factors that must be considered when using this demonstration board. Features The DAC8554EVM is a simple evaluation module designed for a quick and easy way to evaluate the functionality and performance of the high-resolution, quad-channel, serial input DAC8554 digital-to-analog converter (DAC).
  • Page 3: Dac8554Evm Functional Block Diagram

    Additionally, there is also an MSP430-based platform (HPA449) that uses the MSP430F449 microprocessor, to which this EVM can connect and interface as well. For more details or information regarding the 5-6k adapter interface card or the HPA449 platform, please contact your Texas Instruments representative, visit the...
  • Page 4: Pcb Design And Performance

    1.3.1 Related Documentation from Texas Instruments The following documents provide information regarding Texas Instrument integrated circuits used in the assembly of the DAC8554EVM. The latest revisions of these documents are available from the TI web site http://www.ti.com. Data Sheet Literature Number...
  • Page 5: Dac8554Evm Pcb-Top Silkscreen Image

    PCB Design and Performance Figure 2. DAC8554EVM PCB—Top Silkscreen Image Figure 3. DAC8554EVM PCB—Layer 1 (Top Signal Layer) SBAU121 – January 2006 DAC8554EVM User's Guide...
  • Page 6: Dac8554Evm Pcb-Layer 2 (Ground Plane)

    PCB Design and Performance Figure 4. DAC8554EVM PCB—Layer 2 (Ground Plane) Figure 5. DAC8554EVM PCB—Layer 3 (Power Plane) DAC8554EVM User's Guide SBAU121 – January 2006...
  • Page 7: Dac8554Evm Pcb-Layer 4 (Bottom Signal Layer)

    PCB Design and Performance Figure 6. DAC8554EVM PCB—Layer 4 (Bottom Signal Layer) Figure 7. DAC8554EVM PCB—Bottom Silkscreen Image SBAU121 – January 2006 DAC8554EVM User's Guide...
  • Page 8: Dac8554Evm-Drill Drawing

    485 and 64741. The DUT is then allowed to settle for 1ms before the meter is read. This process is repeated for all codes to generate the measurements for INL and DNL. Results of the DAC8554EVM tests are shown in Figure 9...
  • Page 9: Inl And Dnl Characterization Graph Of Dac A

    PCB Design and Performance Figure 9. INL and DNL Characterization Graph of DAC A SBAU121 – January 2006 DAC8554EVM User's Guide...
  • Page 10: Inl And Dnl Characterization Graph Of Dac B

    PCB Design and Performance Figure 10. INL and DNL Characterization Graph of DAC B DAC8554EVM User's Guide SBAU121 – January 2006...
  • Page 11: Inl And Dnl Characterization Graph Of Dac C

    PCB Design and Performance Figure 11. INL and DNL Characterization Graph of DAC C SBAU121 – January 2006 DAC8554EVM User's Guide...
  • Page 12: Inl And Dnl Characterization Graph Of Dac D

    PCB Design and Performance Figure 12. INL and DNL Characterization Graph of DAC D DAC8554EVM User's Guide SBAU121 – January 2006...
  • Page 13: Dac8554Evm Parts List

    PCB Design and Performance Bill of Materials The parts list, showing the components used in the assembly of the DAC8554EVM, is given in Table Table 1. DAC8554EVM Parts List QTY PER ITEM BOARD Ref Des PART NUMBER DESCRIPTION R11–R14...
  • Page 14: Evm Operation

    DAC channels that can be connected without colliding. Table 3 shows how the DAC output channels are mapped into the output terminal, J4, with respect to the jumper positions of JMP11, JMP12, JMP13, and JMP14. DAC8554EVM User's Guide SBAU121 – January 2006...
  • Page 15: Dac Output Channel Mapping

    DAC channels when stacking two EVMs together. Output Op Amp The DAC8554EVM includes an optional signal conditioning circuit for the DAC output through an external operational amplifier, U2. The output op amp is set to unity gain configuration by default. Only one DAC output channel can be monitored at any given time.
  • Page 16: Unity Gain Output Jumper Settings

    Configures op amp U2 for a gain of 2 output Close Close without a voltage offset. JMP5 must be open. JMP6 Inverting input of op amp U2 is disconnected from Open Open the gain resistor, R9. JMP5 must be closed. DAC8554EVM User's Guide SBAU121 – January 2006...
  • Page 17: Capacitive Load Drive Output Jumper Settings

    LDAC pin is set low and DAC update is accomplished via software. A1 pin is set high through pull-up resistor R3. A1 can be driven by GPIO4, J2-14. JMP3 A1 pin is set low. Indicates the corresponding pins that are shorted or closed. SBAU121 – January 2006 DAC8554EVM User's Guide...
  • Page 18 Negative supply rail of the op amp U2 is powered by V for bipolar operation. JMP10 Negative supply rail of the op amp U2 is tied to AGND for unipolar operation. Routes V A to J4-2. JMP11 Routes V A to J4-10. DAC8554EVM User's Guide SBAU121 – January 2006...
  • Page 19 D to J4-8. JMP14 Routes V D to J4-16. Routes J4-1 to U2 noninverting input. JMP15 Routes J4-3 to U2 noninverting input. Routes U2 output to J4-5. JMP16 Routes U2 output to J4-7. SBAU121 – January 2006 DAC8554EVM User's Guide...
  • Page 20: Schematic

    Schematic Schematic DAC8554EVM User's Guide SBAU121 – January 2006...
  • Page 21 TITLE ENGINEER R. BENJAMIN DAC8554EVM VDD = +2.7V to +5.0V Digital J3A (TOP) = SAM_TSM-105-01-L-DV-P VSS = 0V to -15V Analog DRAWN BY R. BENJAMIN J3B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K DOCUMENT CONTROL NO. 6457377 SIZE DATE 6-Oct-2005 SHEET FILE C:\WORK\DAC8554EVM\SCH\DAC8554 EVM.SCH...
  • Page 22 EVM TERMS AND CONDITIONS Texas Instruments (TI) provides the enclosed Evaluation Module and related material (EVM) to you, the user, (you or user) SUBJECT TO the terms and conditions set forth below. By accepting and using the EVM, you are indicating that you have read, understand and agree to be bound by these terms and conditions.
  • Page 23 TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:...
  • Page 24 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments DAC8554EVM...

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