Pin Configurations; Disclaimer - Atmel ATmega256RFR2 Manual

1 Pin Configurations

2 Disclaimer

ATmega256/128/64RFR2
2
Figure 1-1. Pinout ATmega256/128/64RFR2
64 63
[PF2:ADC2:DIG2] 1
[PF3:ADC3:DIG4] 2
[PF4:ADC4:TCK]
3
[PF5:ADC5:TMS] 4
[PF6:ADC6:TDO] 5
[PF7:ADC7:TDI]
6
[AVSS_RFP]
7
[RFP]
8
[RFN] 9
[AVSS_RFN]
10
[TST]
11
[RSTN]
12
[RSTON]
13
[PG0:DIG3]
14
[PG1:DIG1]
15
[PG2:AMR]
16
17 18 19 20 21
Note: The large center pad underneath the QFN/MLF package is made of metal and internally connected
to AVSS. It should be soldered or glued to the board to ensure good mechanical stability. If the
center pad is left unconnected, the package might loosen from the board. It is not recommended to
use the exposed paddle as a replacement of the regular AVSS pins.
Typical values contained in this datasheet are based on simulation and characterization
results of other AVR microcontrollers and radio transceivers manufactured in a similar
process technology. Minimum and Maximum values will be available after the device is
characterized.
62 61 60 59 58 57 56 55 54 53 52 51
Index corner
ATmega256/128/64RFR2
Exposed paddle: [AVSS]
24 25 26 27
22 23
50 49
48 [PE2:XCK0:AIN0]
47 [PE1:TXD0]
[PE0:RXD0:PCINT8]
46
[DVSS]
45
[DEVDD]
44
[PB7:OC0A:OC1C:PCINT7]
43
[PB6:OC1B:PCINT6]
42
[PB5:OC1A:PCINT5]
41
[PB4:OC2A:PCINT4]
40
[PB3:MISO:PDO:PCINT3]
39
[PB2:MOSI:PDI:PCINT2]
38
37 [PB1:SCK:PCINT1]
[PB0:SSN:PCINT0]
36
35 [DVSS]
[DEVDD]
34
[CLKI]
33
28
29 30 31 32
0
0
8393CS-MCU Wireless-09/14