Atmel AT43USB325 Manual
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Atmel AT43USB325 Manual

Atmel AT43USB325 Manual

Multimedia usb keyboard controller with embedded hub
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  • Page 1 Chipsmall Limited consists of a professional team with an average of over 10 year of expertise in the distribution of electronic components. Based in Hongkong, we have already established firm and mutual-benefit business relationships with customers from,Europe,America and south Asia,supplying obsolete and hard-to-find components to meet their specific needs.
  • Page 2 512 bytes of data memory. It is supported by a standard set of peripherals such as timer/counter modules, watchdog timer and internal and external interrupt sources. The major peripheral included in the AT43USB325 is the USB Hub with an embedded function and GPIO ports designed for use in a keyboard controller. The embedded function has 4 endpoints that makes the AT43USB325 extremely suitable for key- boards supporting the consumer page as described in the “USB Usage Tables”.

  • Page 3: Pin Configuration

    Pin Configuration Figure 1-1. 64-lead LQFP AT43USB325E-AC XTAL2 XTAL1 VSS2 CEXT2 VCC1 VCC2 CEXT1 VSS1 64-lead LQFP AT43USB325M-AC Figure 1-2. XTAL2 XTAL1 VSS2 CEXT2 VCC1 VCC2 CEXT1 VSS1 AT43USB325 3355C–USB–4/05...

  • Page 4: Pin Assignment

    AT43USB325 Pin Assignment Pin# Signal Type Pin# Signal Type Bi-directional PF1/SCK/OC1A Bi-directional Bi-directional NC/SSN Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional VCC2 Power Supply/Ground Bi-directional CEXT2 Output Bi-directional VSS2 Power Supply/Ground VCC1 Power Supply/Ground XTAL1 Input CEXT1...

  • Page 5: Signal Description

    Port E[0:3] – Bi-directional I/O port with controlled slew rate which can be used as four PE[0:3] Bi-directional additional keyboard column output strobes, COL[16:19]. PE[4:7] – Bi-directional I/O port. PE[4:7] have built-in series limiting resistors and can be PE[4:7] Bi-directional used to drive LEDs directly AT43USB325 3355C–USB–4/05...
  • Page 6 AT43USB325 Signal Description (Continued) Name Type Function Port F[1:3] – Bi-directional I/O port. In the AT43USB325E, these port pins have dual functions as the interface pins to the serial EEPROM as shown below: Alternate Function 1 Port Pin (AT43USB325E only)
  • Page 7 Figure 1-3. AT43USB325 Enhanced RISC Architecture with USB Keyboard Controller and Hub 8 x 16 Program Status and Interrupt Program Counter Control Unit Memory 8-bit Timer/Counter 32 x 8 Instruction General-purpose Register Registers 16-bit Timer/Counter Watchdog Instruction Timer Decoder 20 Strobe...

  • Page 8: Architectural Overview

    • Four new external interrupt input pins: INTA, INTB, INTC, INTD • USB Hub with attached function The embedded USB hardware of the AT43USB325 is a compound device, consisting of a 5 port hub with a permanently attached function on one port. The hub and attached function are two independent USB devices, each having its own device addresses and control endpoints.
  • Page 9 All interrupts have a separate interrupt vector in the interrupt vector table at the beginning of the program memory. The interrupts have priority in accordance with their interrupt vector position. The lower the interrupt vector address, the higher the priority. AT43USB325 3355C–USB–4/05...

  • Page 10: General-Purpose Register File

    AT43USB325 3. General-purpose Register File Table 3-1. AVR CPU General-purpose Working Register Register Address Comment X-register low byte X-register high byte Y-register low byte Y-register high byte Z-register low byte Z-register high byte All register operating instructions in the instruction set have direct and single cycle access to all registers.

  • Page 11: Arithmetic Logic Unit (Alu)

    AT43USB325M has a masked programmable ROM. Since all instructions are 16- or 32-bit words, the program memory is organized as 8K x 16. The AT43USB325 Program Counter (PC) is 13 bits wide, thus addressing the 8,192 program memory addresses.
  • Page 12 SPI Serial EEPROM Interface (AT43USB325E Only) The AT43USB325E is designed to interface directly with a synchronous serial peripheral inter- face (SPI) SEEPROM such as the Atmel AT25HP256/512. All instructions, addresses and data are transferred with the MSB first and start with a high-to-low SSN transition.
  • Page 13 SRAM Data Memory Table 3-3 summarizes how the AT43USB325 SRAM Memory is organized. The lower 608 Data Memory locations address the Register file, the I/O Memory and the internal data SRAM. The first 96 locations address the Register File + I/O Memory, and the next 512 locations address the internal data SRAM.
  • Page 14 AT43USB325 Table 3-2. SRAM Organization Register File Data Address Space $0000 $0001 $001E $001F I/O Registers $0020 $0021 $005E $005F Internal SRAM $0060 $0061 $025E $045F USB Registers $1F00 $1FFE $1FFF 3355C–USB–4/05...
  • Page 15 Function Endpoint 1 Byte Count Register $1FCB FBYTE_CNT2 Function Endpoint 2 Byte Count Register $1FCA FBYTE_CNT3 Function Endpoint 3 Byte Count Register $1FC7 HSTR Hub Status Register $1FC5 HPCON Hub Port Control Register $1FBC HPSTAT5 Hub Port 5 Status Register AT43USB325 3355C–USB–4/05...
  • Page 16 AT43USB325 USB Hub and Function Registers (Continued) Table 3-3. Address Name Function $1FBB HPSTAT4 Hub Port 4 Status Register $1FBA HPSTAT3 Hub Port 3 Status Register $1FB9 HPSTAT2 Hub Port 2 Status Register $1FB8 HPSTAT1 Hub Port 1 Status Register...
  • Page 17 – – – – – – DPSTATE DMSTATE HCAR0 $1FA7 CTL DIR DATA END FORCE STALL TX PACKET READY STALL_SENT-ACK RX_SETUP_ACK RX_OUT_PACKET_ACK TX_COMPLETE-ACK FCAR0 $1FA5 CTL DIR DATA END FORCE STALL TX PACKET READY STALL_SENT-ACK RX_SETUP_ACK RX_OUT_PACKET_ACK TX_COMPLETE-ACK AT43USB325 3355C–USB–4/05...
  • Page 18 CTL DIR DATA END FORCE STALL TX PACK RDY STALL_SENT_ACK RX_OUT_PACKET_ACK TX_COMPLETE_ACK I/O Memory The I/O space definition of the AT43USB325 is shown in the following table: I/O Memory Space Table 3-5. I/O (SRAM) Address Name Function $3F ($5F) SREG...
  • Page 19 Port 1. Ports 2, 3, 4 and 5 are available as external ports. The actual number of ports used is strictly defined by the firmware of the AT43USB325 and can vary from 0 to 4. Because the exact configuration is defined by firmware, these ports may even function as permanently attached ports as long as the Hub Descriptor identifies them as such.
  • Page 20 AT43USB325 USB Hardware Figure 3-3. Port 0 XCVR Port 2 XCVR Port 3 XCVR Hub Repeater Port 4 XCVR Port 5 XCVR Serial Interface Engine Port 1 Function Interface Interface Unit Unit Data Address Control AVR Microcontroller 3355C–USB–4/05...

  • Page 21: Functional Description

    5V power input. The on-chip power supplies are intended to supply the AT43USB325 internal circuit and the 1.5K pull-up resistor only and should not be used for other purposes. External 2.2 µF filter capacitors are required at the power supply outputs, CEXT1 and CEXT2.

  • Page 22: Reset And Interrupt Handling

    0.01 UF Reset and Interrupt Handling The AT43USB325 provides 12 different interrupt sources with 4 separate reset vectors, each with a separate program vector in the program memory space. Nine of the interrupt sources share 2 interrupt reset vectors. These nine are the USB related interrupts. All interrupts are assigned individual enable bits which must be set (one) together with the I-bit in the status regis- ter in order to enable the interrupt.
  • Page 23 At the same time, other less critical events may need attention after the critical routine is completed. The AT43USB325 solves this problem by having interrupt mask registers in addition to the interrupt enable registers of the USB related interrupts. The difference between the mask and enable registers is: •...

  • Page 24: Reset Sources

    • Watchdog Reset – The MCU is reset when the watchdog timer period expires and the watchdog is enabled. • USB Reset – The AT43USB325 has a feature to separate the USB and microcontroller resets. This feature is enabled by setting the BUS INT EN, bit 3 of the SPRSIE register. A USB bus reset is defined as a SE0 (single ended zero) of at least 4 slow speed USB clock cycles received by Port0.

  • Page 25: Power-On Reset

    If the build-in start-up delay is sufficient, RESET can be connected to V directly or via an external pull-up resistor. By holding the pin low for a period after V has been applied, the Power-on Reset period can be extended. AT43USB325 3355C–USB–4/05...

  • Page 26: External Reset

    AT43USB325 External Reset An external reset is generated by a low-level on the RESET pin. Reset pulses longer than 200 ns will generate a reset. Shorter pulses are not guaranteed to generate a reset. When the applied signal reaches the Reset Threshold Voltage - V...

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