GE DGP Series Instruction Manual page 255

APPENDIX A
APPENDIX A TABLES AND FIGURESA.1 TABLES AND FIGURES
T : 1–1 ORDER CODES ....................................................................................................................................... 1-2
ABLE
T : 1–2 DGP SELECTION GUIDE......................................................................................................................... 1-2
ABLE
T : 1–3 DGP PROTECTION FUNCTIONS............................................................................................................ 1-6
ABLE
T : 1–4 TYPICAL MOTORING POWER................................................................................................................ 1-8
ABLE
T : 2–1 DGP SYSTEM SETTINGS & RATINGS ................................................................................................... 2-3
ABLE
T : 2–2 51V RESTRAINT VOLTAGES ................................................................................................................ 2-22
ABLE
T : 2–3 24A VOLTAGES ..................................................................................................................................... 2-30
ABLE
T : 2–4 DI1 BLOCKING CONFIGURATION........................................................................................................ 2-36
ABLE
T : 2–5 DGP***AAA SETTINGS TABLE.............................................................................................................. 2-41
ABLE
T : 2–6 DGP***ABA SETTINGS TABLE.............................................................................................................. 2-46
ABLE
T : 2–7 DGP***ACA SETTINGS TABLE ............................................................................................................. 2-51
ABLE
T : 4–1 DEFAULT COMMUNICATION PARAMETERS........................................................................................ 4-6
ABLE
T : 4–2 CURRENT INPUTS FOR TESTS T8 & T9 ............................................................................................. 4-22
ABLE
T : 4–3 CURRENT INPUTS FOR TEST T12 ...................................................................................................... 4-24
ABLE
T : 4–4 CURRENT INPUTS FOR TEST T13 ...................................................................................................... 4-25
ABLE
T : 4–5 VOLTAGE INPUTS FOR TEST T14 ....................................................................................................... 4-27
ABLE
T : 4–6 VOLTAGE INPUTS FOR TEST T15 ....................................................................................................... 4-28
ABLE
T : 4–7 VOLTAGE INPUTS FOR TEST T16 ....................................................................................................... 4-30
ABLE
T : 4–8 VOLTAGE INPUTS FOR TEST T17 ....................................................................................................... 4-31
ABLE
T : 4–9 CURRENT INPUTS FOR TEST T18 ...................................................................................................... 4-32
ABLE
T : 6–1 START-UP SELF-TESTS ......................................................................................................................... 6-2
ABLE
T : 6–2 RUN-TIME BACKGROUND SELF-TESTS ............................................................................................... 6-3
ABLE
T : 6–3 RUN-TIME FOREGROUND SELF-TESTS............................................................................................... 6-3
ABLE
T : 6–4 SYSTEM STATUS ERROR MESSAGES ................................................................................................. 6-6
ABLE
T : 6–5 MISCELLANEOUS MESSAGES .............................................................................................................. 6-6
ABLE
T : 6–6 ERROR MESSAGES AT STARTUP......................................................................................................... 6-7
ABLE
T : 6–7 ERROR MESSAGES AT RUNTIME ......................................................................................................... 6-9
ABLE
T : 8–1 MMI ERROR MESSAGES ...................................................................................................................... 8-15
ABLE
T : 8–2 PASSWORD ENCRYPTION KEY TABLE .............................................................................................. 8-17
ABLE
T : 9–1 SCI DIP SWITCH CONFIGURATION....................................................................................................... 9-4
ABLE
T : 9–2 MEMORY MAP ORGANIZATION........................................................................................................... 9-13
ABLE
T : 9–3 DGP MODBUS MEMORY MAP.............................................................................................................. 9-25
ABLE
T : 9–4 COIL COMMANDS ................................................................................................................................. 9-49
ABLE
T : B–2 T 4–4: CURRENT INPUTS FOR TEST T13 ..................................................................................... B-1
ABLE ABLE
Table: B–1 REVISION HISTORY ............................................................................................................. B-1
Table: B–2 ADDITIONS TO DGP MANUAL GEK-100666C .................................................................... B-1
Table: B–3 ADDITIONS TO DGP MANUAL GEK-100666B..................................................................... B-2
Table: B–4 MAJOR UPDATES FOR DGP MANUAL GEK-100666C....................................................... B-3
Table: B–5 MAJOR UPDATES FOR DGP MANUAL GEK-100666B ....................................................... B-4
F 1–1: TYPICAL WIRING DIAGRAM ................................................................................................................. 1-5
IGURE
F 1–2: SINGLE LINE DIAGRAM ........................................................................................................................ 1-6
IGURE
F 1–3: SIMPLE LOGIC DIAGRAM – 87G, 32, 27, 59, AND AE ....................................................................... 1-12
IGURE
F 1–4: SIMPLE LOGIC DIAGRAM – 46, 40, AND 51V .................................................................................... 1-13
IGURE
F 1–5: SIMPLE LOGIC DIAGRAM – 64G1, 64G2, 51GN, AND 24.................................................................. 1-14
IGURE
F 1–6: SIMPLE LOGIC DIAGRAM – 81-O AND 81-U...................................................................................... 1-15
IGURE
F 1–7: SIMPLE LOGIC DIAGRAM – VT FUSE FAILURE................................................................................ 1-16
IGURE
F 1–8: FREQUENCY-SENSITIVITY CHARACTERISTICS.............................................................................. 1-20
IGURE
F 1–9: ELEMENTARY DIAGRAM WITH TEST BLOCKS, WYE VT
IGURE
F 1–10: ELEMENTARY DIAGRAM WITH TEST BLOCKS, DELTA VT
IGURE
F 1–11: ELEMENTARY DIAGRAM WITHOUT TEST BLOCKS, WYE VT
IGURE
F 1–12: ELEMENTARY DIAGRAM WITHOUT TEST BLOCKS, DELTA VT
IGURE
F 1–13: DIGITAL RELAY SYMBOL LEGEND.................................................................................................. 1-27
IGURE
F 2–1: SAMPLE GENERATOR SYSTEM .......................................................................................................... 2-2
IGURE
GE Power Management DGP Digital Generator Protection System
A.1 TABLES AND FIGURES
A.1.1 LIST OF TABLES
A.1.2 LIST OF FIGURES
............................................................... 1-23
S
......................................................... 1-24
S
..................................................... 1-25
S
.................................................. 1-26
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