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AC Characteristics
Input Timing Characteristics
FR
F1, F2
LP
YD
CIO1, 2
(IN)
The FR latched at the nth LP is reflected in the output at the n+1th LP.
Item
LP Frequency
LP "H" Pulse Width
LP "L" Pulse Width
FR Setup Time
FR Hold Time
F1, F2 Setup Time
F1, F2 Hold Time
Input Signal Rise Time
Input Signal Fall Time
CIO Setup Time
CIO Hold Time
YD → LP Allowable Time
Item
LP Frequency
LP "H" Pulse Width
LP "L" Pulse Width
FR Setup Time
FR Hold Time
F1, F2 Setup Time
F1, F2 Hold Time
Input Signal Rise Time
Input Signal Fall Time
CIO Setup Time
CIO Hold Time
YD → LP Allowable Time
MLS Driver Chip Set
Technical Manual
t
t
FRDS
FRDH
t
t
FFDS
FFDH
t
SET
t
t
DS
DH
= +5.0 V ± 10%, Ta = –30 to +85°C)
(V
CC
Signal
Parameter
t
CCL
t
WCLH
t
WCLL
t
FRDS
t
FRDH
t
FFDS
t
FFDH
t
r
t
f
t
DS
t
DH
t
SET
(V
= +2.7 V to 4.5 V, Ta = –30 to +85°C)
CC
Signal
Parameter
t
CCL
t
WCLH
t
WCLL
t
FRDS
t
FRDH
t
FFDS
t
FFDH
t
r
t
f
t
DS
t
DH
t
SET
EPSON
SED1751
t
t
r
f
t
t
WCLH
WCLD
t
CCL
Min
Max
Units
500
55
330
100
40
100
40
50
50
100
40
80
Min
Max
Units
800
100
660
200
80
200
80
100
100
200
80
150
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5–11
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