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1. 16 fault records, triggered by TRIP or Z2PU or Z2Z3, depending on the FDAT settings (see Section 3.4.16,
4.8 and 5.2.2).
2. 16 sets of oscillographic data, triggered by TRIP or Z2PU or Z2Z3 or ∆V ∆I, depending on the OSC setting
(see Sections 3.4.19, 4.9 and 5.2.1).
3. Dual (V or I) zero-sequence polarizing unit: see Systems External Connection Drawing, Figure 4-3; External
Connection Diagram (Appendix J , 2419F59, Sheet 3 of 4); Section 3.4.11 (Selectable Ground Directional
Unit (ZSEQ/NSEQ/DUAL); and Acceptance Test, Section 1.1.9, Step 25.
4. The front panel RESET button (now) cannot reset the fault data. It can only reset the flashing LED (see Sec-
tion 4.4.3).
5. For the purpose of self-check, the display will now be blocked momentarily every minute (see Sections 1.3.6
and 4.4.2).
6. The push-to-close output contacts test simplifies the annual maintenance check (see Section 3.4.15 and
Acceptance Test, Section 1.1.13, Step 35).
7. The 3I 0 signal (now) is generated by software (I a +I b +I c ) and the fourth current transfer is for the DUAL po-
larizing direction application only. The test method and wiring for the 3φ tests are completely different from
the previous version (refer to Acceptance Tests, Section 1.1.4, Step 12 (3φ test and Figure H-2); and Sec-
tion 1.4 (OSB test).
1. Sensitivity of NSEQ
2. LOPB
3. For POTT system only
a. Connect PLTP & PLTG to carrier keying directly (OR16A & OR18) and modify the signal continuation
logic (TRSL, CIF, AND49A, etc.) to avoid the Send signal dropout time delay (o/150) for the remote for-
ward fault.
b. Remove RBSW setting. The reverse block timer logic should always be applied to the POTT system to
increase security on transient due to the unequal pole trip of the adjacent or parallel line.
c. Add a path between 16/0 (RDOG*Ios) and OR41A for weakfeed application to avoyid the false forward
fault trip on the strong feed terminal if the fault is beyond the reach of Zone-3 setting of the weak-feed
terminal.
d. Add a path between 16/0 (RDOG*Ios) and OR9A to extend the reach of transient block.
e. For open breaker, omit 52b keying and add echo keying (AND34B).
4. For BLOCKING system only
a. Improve and speed up delta V & I keying.
b. Extend the setting of BLKT timer from 0-32 to 0-98 ms.
c. Remove open breaker (52b) timer (180/0) for Carrier Stop.
(5/92)
Significant Changes to V2.00 (from V1.65)
(for customers who are familiar with Version 1.60 and beyond)
MDAR Version V2.01
– Change from I2=0.5 to 312=0.5.
– Add a NOT 52b to the input of AND1F gate to avoid the dropout of AL1 (alarm-
1) for the condition of removing the ac voltages before the breaker opening.
v
I.L. 40-385.1B
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