Software Issues; Configuration - Realtek RTL8100 Programming Manual

2.5 Software Issues

This section covers the handling of various data reception topics.
1. Handling a Receive Buffer Overflow:
The Rx DMA (FIFO to buffer) is stopped. The CAPR must be updated first to dismiss the ISR (RxBufferOverflow)
event. The correct actions to process RxBufOvw are:
a. Update CAPR.
b. Write a '1' to ISR (ROK).
The Rx DMA resumes after step b.
2. Handling RxFIFOOvw:
When RxFIFOOvw occurs, all incoming packets are discarded. Clearing ISR (RxFIFOOvw) doesn't dismiss the
RxFIFOOvw event. To dismiss the RxFIFOOvw event, the ISR (RxBufOvw) must be written with a '1'.
3. Rx FIFO early threshold:
No early (FIFO->Buffer DMA starts when the whole packet is in the FIFO). If an incoming packet is larger than the size
of the FIFO(2K), RxFIFOOvw will be set, but Rx DMA will never start, so the receive path is disabled.
Note: Never set Rx FIFO early threshold to NoEarly.
4. Suggested handling:
if (RxFIFOOvw | RxBufOvw | ROK)
{
clear ISR(RxFIFOOvw | RxBufOvw | ROK)
}
if (ROK)
{
while(BufEmpty=0)
{
read one packet then update CAPR
}
}

2.6 Configuration

The Maximum DMA burst size (MXDMA) per Rx DMA burst should be considered carefully. It is recommended to use the
value of 1024 bytes.
When WRAP is enabled, the RTL8100 will move the reset of the packet data immediately after the buffer. This will make the last
packet in the buffer continuous. However, the Receive buffer has to leave 1.5k additional space for this packet.
2001/12/10
8
RTL8100
Rev.1.0