Registers Involved; Software Issues - Realtek RTL8100 Programming Manual

Single chip fast ethernet controller with power management
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1.4 Registers Involved

1. TSAD0-3
2. TSD0-3
3. ISR (TOK,TER),IMR (TOK,TER)
4. TCR: Transmit Configuration register
5. TSAD: Reflects the corresponding bits in the TSD0-3.

1.5 Software Issues

This section covers the handling of Interrupts. When the driver is processing a transmit interrupt, the following two cases should
be managed properly.
Case 1: More than one interrupt between TOK and when ISR routine called.
=>Drivers have to check as many descriptor as possible.
ISR Routine
Interrupt
Packet
Case 2: No packet TOK needs to be handled, but the ISR routine is called.
ISR Routine
Interrupt
Packet
1.6 Configuration
The Maximum DMA burst size (MXDMA) per Tx DMA burst should be considered carefully. It is recommended to use the
value of 1024 bytes.
2001/12/10
4
RTL8100
Rev.1.0

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