Rf Synthesizer (As); 11-1. General; Frequency Synthesis Scheme; 11-5. 310-440 Mhz Phase Locked Loop - Motorola R-2002A Manual

SECTION 11
RF SYNTHESIZER (AS)
11-1. General. The RF Synthesizer provides an RF signal source for the frequency range from 10kHz to 1
GHz in 100Hz steps. The output frequency is programmed by the processor through the RF control bus and is
phase locked to the 10 MHz frequency standard. A reference divider in the module produces outputs of 500
kHz, 50 kHz, 5kHz, 1 kHz, 100Hz, and 50 Hz (SYNTH SWP SYNC) each having the same accuracy as the
frequency standard. A block diagram of the RF Synthesizer is shown in figure 11-1 and its schematic is shown
in figure 11-3.
11-2. Frequency Synthesis Scheme. Four phase locked loops are used to generate the output frequency; a
60.5 MHz loop, a 310-440 MHz loop, the 500 MHz-1000 MHz loop, and the 550 MHz loop. Two of these loops
contain programmable dividers, controlled by the microprocessor for varying the frequency. The 310-440 MHz
loop is controlled by the four most significant digits of the required frequency and operates in discrete 50 kHz
increments. The 60.5 MHz loop is controlled by the three least significant digits of the required frequency and
operates in discrete 50 Hz increments.
11-3. The output is derived from three sources, covering the ranges of 10kHz to 250 MHz, 250 MHz to 500
MHz, and 500 MHz to 1000 MHz. In the first range, 10kHz to 250 MHz, the output is derived by mixing the fixed
550 MHz signal with 500-1000 MHz signal programmed for frequencies from 550.01 MHz to 800 MHz. For the
second range, 250 to 500 MHz, the output is a divide by two of the 500-1000 MHz signal. The final range is the
500-1000 MHz signal directly. The appropriate frequency source is switched to the SYNTH RF output by the
Output Select switch.
11-4. A basic flow diagram for programming the RF Synthesizer is shown in figure 11-2. This diagram
includes generate and monitor considerations, wideband amplifier control, and modulation control.
11-5. 310-440 MHz Phase Locked Loop. A single 310-440 MHz VCO is phase locked to the 100 kHz
reference input using a straight forward loop. The VCO output is divided down to 50 kHz using a
programmable two modulus prescaler and divider. Programming of the divider is controlled by the processor
to give output frequencies from 310 to 440 MHz in 50 kHz steps.
11-6. 60.5 MHz Phase Locked Loop. The 60.5 MHz loop is programmable over a ±100kHz range in 50 Hz
increments. The 60.5 MHz VCO output is mixed with a 50 MHz signal from the 550 MHz loop. A programmable
divider following the mixer divides the 10.5 MHz ±100kHz signal down to the 50 Hz reference frequency. A
comparison between the divider output and the reference signal by the Phase/Frequency detector results in an
error voltage to the VCO which maintains the phase lock.
11-7. 550 MHz Phase Locked Loop. A fixed frequency of 550 MHz is obtained by dividing the550 MHzVCO
by 55 to obtain 10 MHz. The 10 MHz from the divider is compared with the 10 MHz frequency standard in the
Phase/Frequency Detector. The resulting error signal is filtered and used to correct the 550 MHz VCO to
maintain it in lock.
11-8. A Voltage Controlled Attenuator (VCA) follows the 550 MHz output to level the generator output for
frequencies below 1 MHz. The leveling loop in the RF Input module provides the ALC VOLT control signal to
maintain the required output level at the front panel RF jack. See paragraph 5-31 for a further description of
output leveling.
11-1