Tait TM8000 Series Service Manual page 62

Ramping
Bias Ramp-up
Power Ramp-up
62 General Description
Power ramp-up consists of two stages:
bias
power ramping
The timing between these two stages is carefully controlled in order to
achieve the correct overall wave shape and meet the specification for
transient ACP (adjacent channel power). A typical ramping waveform is
shown in Figure 2.15.
The steady-state final-stage bias level is supplied by an 8-bit DAC
programmed prior to ramp-up but held to zero by a switch on the DAC
output under the control of a
release by the
TX INHIBIT
by a low-pass filter. Owing to power leakage through the PA chain,
ramping the bias takes the PA output power from less than –10 dBm to
approximately 25 dB below steady-state power.
The power ramp signal is supplied by a 13-bit DAC that is controlled by
custom logic. The ramp is generated using a look-up table in custom
logic memory that is played back at the correct rate to the DAC to
produce the desired waveform. The ramp-up and ramp-down
waveforms are produced by playing back the look-up table in forward
and reverse order respectively. For a given power level the look-up table
values are scaled by a steady-state power constant so that the ramp
waveform shape remains the same for all power levels.
signal. Bias ramp-up begins upon
TX INHIBIT
signal with the ramping shape being determined
TM8100 Mobile Radio Service Manual
May 2004 © Tait Electronics Limited