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39
CONV_IN
DGND
START_IN
DGND
Commo
Signal name
CONV_IN
DGND
START_IN
DGND
CONV_OUT
DGND
START_OUT
DGND
DGND
-
All digital signals on the synchronization connector correspond to the LVCMOS voltage level
standard for + 3.3V supply voltage. The internal resistance of the inputs START_IN, CONV_IN is
300 Ω. The internal resistance of the outputs CONV_OUT and START_OUT is 50 Ω.
For the maximum permissible voltages and currents at the contacts of the connectors, see the
4.3
42
section
, on p.
4.2.4.1. Connections with intermodule synchronization.
These connections are designed for short connections of L-502 modules located in adjacent
PCIe-slots with two twisted pairs.
The connection of modules located on different computers is not supported.
With the connection shown in the figure below, module # 1 is the master, and the others are
slaves. The software of such a system should ensure the start of data collection of the master
module after the slave starts and pre-programmed these modules to the appropriate synchronization
modes.
DGND
CONV_OUT
DGND
START_OUT
Разъём
Output enable
конфигурации
configuration
разрешения
connector
выхода
Table 4-3: Intermodule synchronization connector
Direc-
n point
tion
Input
Input
Output
Output
-
4.2: L-502 connectors description.
Fig. 4-5: Intermodule
synchronization connector (L-502
version 3).
Внутренний
Internal
сигнальный
signal
разъём
connector
State after
connection
Input
The input of the synchronization pulse of the
ADC-DAC conversion and input-output (from
the neighboring module L-502)
Input
Input of start signal of ADC-DAC and input-
output (from neighboring module L-502). Active
logical signal level is high.
Output
Output of conversion signal of ADC-DAC and
input-output (to neighboring module L-502).
Output
Output of start signal of ADC-DAC and input-
output (to neighboring module L-502).
Active logical signal level is high.
-
Common wire circuit for sync connector
Description
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