Dynamic Engineering PMC-XM-DIFF User Manual page 14

PMC_XM_STATUS
[0x0008] Status Register Read / Latch Clear Write
Data Bit
30-24
19-10
FIGURE 5
Local Interrupt Active: When read as a '1', a local interrupt condition is active.
Currently, the only such condition is the Force Interrupt bit in the Base Control Register.
A system interrupt will not occur unless the Master Interrupt Enable bit in the Base
Control Register is also set. When read as a '0', no local interrupt conditions are active.
Virtex Configuration Done: When read as a '1', the Virtex FPGA has successfully
configured. When read as a '0', the Virtex configuration was not successful.
Virtex Init Status: When read as a '1' after the Virtex configuration, it indicates that a
CRC error did not occur during the Virtex configuration. When read as a '0' after the
Virtex configuration, it indicates that a CRC error occurred during the previous Virtex
configuration. In this case the Done bit should also be low.
Virtex Status 3-0: These bits are driven by the Virtex to indicate arbitrary status
conditions. In the current Virtex ATP design they are all low, but they can be assigned
for any purpose desired.
Interrupt Status: When read as a '1', an enabled local interrupt condition is active and a
system interrupt should be asserted. When read as a '0', no enabled local interrupt is
active.
Status Register
31
23
22
21
20
9
8
7-1
0
PMC-XM SPARTAN3 STATUS REGISTER
Embedded Solutions
Description
Interrupt Status
Spare
Virtex Status 3
Virtex Status 2
Virtex Status 1
Virtex Status 0
Spare
Virtex Init Status
Virtex Configuration Done
Spare
Local Interrupt Active
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