General Purpose I/O Interface; Jtag Interface - Huawei MU509 Series Hardware Manual

HUAWEI MU509 Series HSDPA LGA Module
Hardware Guide

3.9 General Purpose I/O Interface

The LGA module provides 8 channels GPIO pins for customers to use controlling
signals which are worked at 2.6 V CMOS logic levels. Customers can use AT
command to control the state of logic levels of eight channels GPIO output signal. For
MU509-b, MU509-g and HUAWEI MU509-1, see the
Module AT Command Interface
MU509-c HSDPA LGA Module AT Command Interface
Table 3-13 Signals on the GPIO interface
Pin No.
44, 45, 46, 51, 55,
105, 109, 113

3.10 JTAG Interface

The MU509 module provides one JTAG interface (Joint Test Action Group). It is
suggested that place the follow test points in the DTE board for debug. It is
recommended that set the 9 pins related to JTAG interface as test points on the DTE
for tracing and debugging.
Table 3-14 Signals on the JTAG interface
Pin No. Pin Name
30
36
42
72
87
93
14
32
Issue 09 (2014-03-06)
Specification. For MU509-c, see the
Pin
Name
GPIO
I/O
JTAG_TMS I
JTAG_TRST_N I
JTAG_TCK I
JTAG_TDO O
JTAG_TDI I
JTAG_RTCK O
PS_HOLD I
VCC_EXT1 P
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Copyright © Huawei Technologies Co., Ltd.
Description of the Application Interfaces
HUAWEI MU509 HSDPA LGA
Specification.
I/O Description
I/O General I/O
pins
Description
JTAG Test mode
select
JTAG reset.
JTAG clock input
JTAG test data
output
JTAG test data
input
JTAG return clock
This input high to
keep power on, low
to shut down.
1.8 V POWER
output
HUAWEI
DC Characteristics (V)
Min. Typ. Max.
–0.3 2.6 2.9
DC Characteristics (V)
Min. Typ. Max.
–0.3 1.8 2.1
–0.3 1.8 2.1
–0.3 1.8 2.1
–0.3 1.8 2.1
–0.3 1.8 2.1
–0.3 1.8 2.1
- 1.8 -
- 1.8 -
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