Denon DN-S3700 Service Manual page 39

R5S72630P200FP Terminal Function
Pin
Pin Name
No.
1 PC10/nRASU/nBACK/AUDATA0
2 PC9/nCASL
3 PC8/nRASL
4 VCC
5 PC7/nWE3/DQMUU/nAH/nICIOWR
6 VSS
7 PVSS
8 PC6/nWE2/DQMUL/nICIORD
9 PVCC
10 PC5/nWE1/DQMLU/nWR
11 nCS0
12 nRD
13 PC4/nWE0/DQMLL
14 PC3/nCS3
15 PC2/nCS2
16 VCC
17 PC0/A0/nCS7/nAUDSYNC
18 VSS
19 PVSS
20 PC1/A1
21 PVCC
22 A2
23 A3
24 A4
25 A5
26 A6
27 A7
28 A8
29 PVCC
30 A9
31 PVSS
32 VSS
33 A10
34 VCC
35 A11
36 A12
37 A13
38 A14
39 A15
40 A16
41 PVSS
42 A17
43 PVCC
44 A18
45 A19
46 A20
47 PE2/A21/SCK0
48 PE3/A22/SCK1
49 PE0/nBS/RXD0/nADTRG
50 CKIO
51 VCC
52 VSS
53 PVSS
54 PVCC
55 XTAL
56 EXTAL
57 NMI
58 PLLVSS
59 nRES
60 PLLVCC
61 nASEMD
62 PE8/nCE2A/IRQ4/SCK2
63 PE1/nCS4/nMRES/TXD0
Symble I/O
MUTE O General-purpose port
SHCAS O nCASL
SHRAS O nRASL
VCC P Power supply for in
TP1 O General-purpose port
VSS G -
PVSS G GND for I/O
- O General-purpose port
PVCC P Power supply for I/O
DQMLU O DQMLU
CS0 O CS0 :FLASH ROM
SHRD O nRD
SHWE O nWE0/DQMLL
CS3 O nCS3
PC2 O General-purpose port
VCC P Power supply for in
ADSPRST O General-purpose port
VSS G -
PVSS G GND for I/O
SHA1 O A1
PVCC P Power supply for I/O
SHA2 O A2
SHA3 O A3
SHA4 O A4
SHA5 O A5
SHA6 O A6
SHA7 O A7
SHA8 O A8
PVCC P Power supply for I/O
SHA9 O A9
PVSS G GND for I/O
VSS G
SHA10 O A10
VCC P Power supply for I/O
SHA11 O A11
SHA12 O A12
SHA13 O A13
SHA14 O A14
SHA15 O A15
SHA16 O A16
PVSS G GND for I/O
SHA17 O A17
PVCC P Power supply for I/O
SHA18 O A18
SHA19 O A19
SHA20 O A20
- O General-purpose port
- O General-purpose port
USB_EN O General-purpose port
CKIO O CKIO
VCC P Power supply for in
VSS G
PVSS G GND for I/O
PVCC P Power supply for I/O
XTAL O Oscillation output
EXTAL I EXTAL
NMI I NMI
PLLVSS G
/RES I /RES
PLLVCC P
Emulator function ON/
/ASEMD I
OFF
SUB_INT I IRQ4
DA1 O General-purpose port
39
DN-S3700
Function
ADC MUTE output : Mute On = L,
SDRAM /CAS
SDRAM /RAS
Digital +1.2V
OPEN (Unused: Monitor output for examination) :
ES → TC change point
Digital GND
Digital GND
OPEN (Unused : General-purpose Lo output setting)
Digital +3.3V
SDRAM DQMU
FLASH /E
FLASH_nG + ADSP_HDS1 :
ADSP connection addition
SDRAM DQML + ADSP_HDS2 : ADSP connection addition
Access switching function ⇒ nWE0
SDRAM /CS
OPEN (Unused : General-purpose Lo output setting
Digital +1.2V
ADSP reset signal output : Active = L (Pull Down)
Digital GND
Digital GND
SDRAM/FLASH A0 +ADSP_HHWIL :
ADSP connection addition
Digital +3.3V
SDRAM/FLASH A1 +ADSP_HCNTL0 :
ADSP connection addition
SDRAM/FLASH A2 +ADSP_HCNTL1 :
ADSP connection addition
SDRAM/FLASH A3
SDRAM/FLASH A4
SDRAM/FLASH A5
SDRAM/FLASH A6
SDRAM/FLASH A7
Digital +3.3V
SDRAM/FLASH A8
Digital GND
Digital GND
SDRAM/FLASH A9
Digital +1.2V
SDRAM/FLASH A10
SDRAM/FLASH A11
FLASH A12
FLASH A13
FLASH A14
FLASH A15
Digital GND
FLASH A16
Digital +3.3V
FLASH A17
FLASH A18
FLASH A19
Deck1 FL shift clock output :
(Unused : General-purpose Lo output setting
Deck1 FL chip selection output :
(Unused : General-purpose Lo output setting
USB VBUS ENABLE signal output (L : ENABLE)
SDRAM CLK
Digital +1.2V
Digital GND
Digital GND
Digital +3.3V
Unused: OPEN
16.9344MHz input
Unused: 3.3k pull-up
Digital GND
JTAG I/F connector ⑬ H pin
1.2V after LC
JTAG I/F connector ③ H pin
Sub CPU INT Terminal
FL DATA output :
(Unused : General-purpose Lo output setting