External Clock Input/Output; Counter; Memory - Measurement Computing USB-7202 User Manual

USB-7202 User's Guide

External clock input/output

Parameter
Pin name
Pin type
Software-selectable direction
Input clock rate
Clock pulse width
Input leakage current
Input high voltage
Input low voltage
Output high voltage (Note 3)
Output low voltage (Note 3)
Note 3: SYNC is a Schmitt trigger input and is over-current protected with a 1.5 kΩ series resistor.

Counter

Parameter
Pin name (Note 4)
Counter type
Number of channels
Input type
Input source
Resolution
Schmidt trigger hysteresis
Input leakage current
Input frequency
High pulse width
Low pulse width
Input high voltage
Input low voltage
Note 4: CTR is a Schmitt trigger input protected with a 1.5 kΩ series resistor.

Memory

Parameter
Data FIFO
EEPROM
EEPROM configuration
Table 7. External clock I/O specifications
Conditions
Output
Input
Input
Output
IOH = –2.5 mA
No load
IOL = 2.5 mA
No load
Table 8. Counter specifications
Specification
CTR
Event counter
1
TTL, rising edge triggered
CTR screw terminal
32 bits
20 mV to 100 mV
±1µA
1 MHz max
500 ns min
500 ns min
4.0 V min, 5.5 V absolute max
1.0 V max, –0.5 V absolute min
Table 9. Memory specifications
Specification
32,768 samples, 65,536 bytes
1,024 bytes
Address range
0x000-0x1FF
0x200-0x3FF
21
Specification
SYNC
Bidirectional
Outputs internal A/D pacer clock.
Receives A/D pacer clock from external source.
50 kHz, max
1µs min
5µs min
±1.0µA
4.0 V min, 5.5 V absolute max
1.0 V max, –0.5 V absolute min
3.3 V min
3.8 V min
1.1 V max
0.6 V max
Access Description
Reserved 512 bytes system and Cal data
Read/write 512 bytes user area
Specifications