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7SV512
V1
5.2.4
Connections
General and connection diagrams are shown in Ap-
pendix A and B. The marshalling possibilities of the
binary inputs and outputs are described in Section
5.5.
Because of the high safety demand for the breaker
failure protection, a special trip release module is
provided for two of the trip relays. The operation of
this hardware logic module is described in Section
4.2.7.
General
start
">Start
BI 10
General
trip
>Trip
BI 9
External
block
>BFP block"
BI 8
Figure 5.4
Trip release module (hardware module)
Should the plug positions be changed for any rea-
son, the following is to be noted:
--- If one of the plugs Pl1 or Pl2 or Pl3 is removed, the
corresponding AND condition is fulfilled!
--- The outputs of the AND---gates must not be paral-
leled by the plugs Pl4 and/or Pl5.
--- Nevertheless, it is admissible that the output of
the AND---gate Rel0 is connected to both trip re-
lays K1 and K2.
C53000---G1176---C91
For the trip release module to operate optimally, cer-
tain plug jumpers are to be observed on the addi-
tional p.c.b. EAZ---2. The trip release module and its
surroundings are shown in Figure 5.4. As delivered
from factory (= recommended positions) the binary
inputs BI 8, BI 9, and BI 10 must be assigned as
shown in Figure 5.4. The trip relays must be as-
signed such that trip relay K1 trips the bus-bar
breakers whereas trip relay K2 is intended to give
transfer trip signal to the opposite end breaker.
Trip release module
Pl1
&
Rel1
Pl2
&
Rel0
&
Rel2
Pl3
Figure 5.5
Installation instructions
from processor
Pl4
Pl5
Pl1
X1
X2
X3
Pl2
X70 X71 X72
Pl3
X73 X74 X75
X80 X81 X82
K1
Rel1
Rel0
X89 X91 X90
X86 X87 X88
K2
Rel0
Rel2
X83 X84 X85
Plug jumper arrangement
Trip
relays:
"BFP Trip BB"
K1
"BFP TransTrip"
K2
e.g.
X1---X3: closed =
X1---X2: closed
X70---X71 closed =
X70---X72 closed
X73---X74 open =
X74---X75 closed
e.g.
X80---X81 and
X89---X91:
Rel1 connected to K1
or
X87---X88 and
X84---X85:
Rel2 connected to K2
45
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