Overview Of The Evtek-5103 Address Space; Evtek-5103 Address Space Harnessed 8051 Port Pins; Evtek-5103 Programming Instructions; Evtek-5103’S Areas Reserved For The Debugger - SIIG Network Device EVTEK-5103 Overview

Siig evtek-5103 product manual
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Overview of the EVTEK-5103 address space:

Hex Address:
0000...1FFF
2000...27FF
2800...2FFF
3000...37FF
3800...3FFF
4000...B3FF
B400...B5FF
B600...B7FF
B800...B9FF
BA00...BBFF
BC00...BDFF
BE00...BFFD
BFFE...BFFF
C000...FEFF
FF00...FFFF
14000...1FFFF
I2C: 0000...7FFF
I2C: 8000...FFFF
(* Aux /CS refers to Auxiliary Chip Select (P1.7) line used with the Board's memory mapped I/O addressing.
(** this external RAM area is not copied or overwritten when operation modes 2 or 3 are executed
(*** it is possible to address upper 48 kB page of external RAM by setting the memory page select jumper to RAM page select
allowed position and setting P1.6 high.
(**** When appending the second I2C EEPROM to the system, N.B. device address code implementation is required from both
EEPROM chips. Also OS I2C routine device addressing requires update.

EVTEK-5103 address space harnessed 8051 port pins:

Pin nr
Pin name
P1.0
T2
P1.1
T2EX
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.2
/INT0
P3.3
/INT1
/EA

EVTEK-5103 Programming instructions:

1) Start your program with a ".ORG 4000h".
2) Open a DOS prompt window in the directory where your *.asm files are located
3) Compile your assembler source code to object file with command A51 filename (no ".ASM" needed)
4) If errors were found, you can type EDIT filename.LST
5) compile the *.OBJ –file to binary file with command HEX2BIN /O-16384 filename.OBJ filename.BIN
N.B: You can download MCS-51 Microcontroller Family User's Manual from www-address
design/mcs51/manuals/27238302.pdf. Chapter 2 contains the 8051 Programmer's Guide and Instruction Set.
Debugger: Type a question mark '?' to display the help file.
EVTEK-5103's areas reserved for the Debugger (Board operation mode 7):
Location:
Register
8051 SFR
TCON bits 6 and 7
8051 SFR
Port 3 bit 2
8051 SFR
Port 1 bit 6
8051 SFR
PSW bits 3 to 5
8051 SFR
IE bits 3 and 7
8051 SFR
IP (all bits)
8051 SFR
TMOD bits 4 to 7
8051 int. RAM
Stack pointer uses 8051's indirect internal RAM locations 80h...FFh stack space
External RAM
Memory locations FF00h...FFFFh (breakpoint stack etc.) and BA00h...BA02h (Timer 1 INT
vector)
Address Contents:
External EPROM (contains the operating system of the Board)
Aux /CS (* = 0 for Serial port 1
Aux /CS (* = 0 for Printer Par. Port
Aux /CS (* = 0 not used
Aux /CS (* = 0 not used
External RAM: free area to be used as program or data memory
External RAM: IE0 Interrupt Vector
External RAM: TF0 Interrupt Vector
External RAM: IE1 Interrupt Vector
External RAM: TF1 Interrupt Vector
External RAM: RI & TI Interrupt Vector
External RAM: TF2 & EXF2 Interrupt Vector
External RAM: RESERVED for operation modes 0 and 1
External RAM: free area to be used as program or data memory (**
External RAM: RESERVED for operation mode 6 (**
External RAM Upper page: free area (***
External Serial I2C EEPROM: RESERVED for operation modes 2 and 3
External Serial I2C EEPROM: Free area, not implemented (****
Reserved pins function:
I2C SCL (Serial Clock line)
extra interrupt /INT2 from the 16C552 Printer Par. Port
I2C SDA (Serial Data line)
I2C EEPROM WP (Write Protection bit)
16C552 PEMD (16C552 Printer Par. Port specific bit)
16C552 /ENIRQ (16C552 Printer Par. Port specific bit)
SRAM A16 (page select) selection bit
Aux /CS (Auxiliary Chip Select bit)
External interrupt /INT0 – 16C552 Serial port 1
External interrupt /INT1 – 16C552 Serial port 2
External Memory Access (tied to GND)
Notation
TCON.6, 7
P3.2
P1.6
PSW.3,4,5
IE.3, IE.7
IP
TMOD.4,5,6,7
Aux /CS (* = 1 for Serial port 2
Aux /CS (* = 1 for Mode Switches
Aux /CS (* = 1 for Parallel Ports 1 & 2
Aux /CS (* = 1 for Parallel Port 3
ftp://download.intel.com/
Function
8051's Timer 1 run ctrl bit & OV flag
External Serial Port 1 interrupt input pin
SRAM page select bit
Reg. bank selectors & g.p. user flag
8051's Timer 1 OV INT & EA
8051's Interrupt Priority Register
8051's T1/C1 mode control register
Dir
Out
In
Bi
Out
Out
Out
Out
Out
In
In
In

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