Figure 5.4-2: Cib-10 Tor Input And Output - Moog 903 User Manual

903-0623-00 Rev. A
Schematics for channel 1 TOR input and output are shown in Figure 5.4-2, with the Type 1 (both dual
switches open) shown. The other TOR channels are identical, where channel 2 input is configured by
switches SW3 and SW4, channel 3 input is configured by switches SW5 and SW6, etc. Both switches
must be "open" (off) for Type 1 and "closed" (on) for Type 2 configuration. Note that SW2, SW4, SW6...
SW20 are single pole double throw (SPDT) switches with no common, where circuit 1 is "open" and
circuit 2 is "closed", or vice versa. Setting SW2, for example, to "open" refers to circuit 1 being open.
Figure 5.4-2 shows SW1 and SW2 both "open" (off).
TOR inputs are polled at regular intervals by a microcontroller and encoded in a frame on a single
9600 baud data stream, which is sampled by the Model 903 multiplexer. The microcontroller at the other
end of the system reads the demultiplexed 9600 baud data stream and sets the TOR outputs according to
the encoded bits. Latency is less than 5 milliseconds.
Any time the Model 903 optical data link is lost, including initial start up, the TOR outputs are all set to the
open state until the link is restored. If the receiving microcontroller detects errors in the frame, the outputs
are set to open until an error-free frame is received.
Opto-couplers on the TOR inputs invert the incoming signal. This is compensated for by the
microcontroller program, which translates low TTL inputs to high TTL outputs for the remainder of the
Model 903 system.
R3
+IN1
2K21
SW2
2
-IN1
1
78HJ01GW
OUT_TOR1
Focal Technologies Corp.
TOR INPUT (TYPE 1 OR 2)
R1
150R
R4
270R
D2
D1
BZX84C4V7 LL4148
3
4
R5 150R
+5VISO3
TOR OUTPUT
R51 OPEN
U13A U13B
R53
1 2 3
0R 5%
MC74HC04AD

Figure 5.4-2: CIB-10 TOR Input and Output

Model 903 User's Guide, FMB-X-2.5 Version
SW1
1 4
2 3
78HF01GW
2
ISOGND3
3
R54
4
698R
K1A
MC74HC04AD
AQW212A
+5V
C1
0u1F
U1 R2
3K48R
8
6
IN_TOR1
5
HCPL-0501
-OUT1
+OUT1
R57 0R 5%
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