Keithley 2002 Repair Manual page 57

Troubleshooting
Test 202.26 — Integration period bit I3
Type
Fault message
Description
Drawing reference
Components
Bit patterns
Test 202.27 — Baseline for 202.28
Type
Fault message
Description
Drawing reference
2-44
Pass/Fail
Integration period bit I3
Integration time is set up with I3 and I0 high and all other I lines low. This test uses the same
circuit setup as test 202.1. A reading is acquired and compared to a calculated value based on
the previous reading.
Analog Board; 2002-100
A/D Converter; 2002-160
Shift registers that set up the I15 through I0 levels, open or shorted lines associated with the I
lines, or U816.
—U811—
00001101
—U224—
00010111
—U400— —U432—
01111011 10000000
*Bits associated with register IC terminals as follows:
Q Q Q Q
87654321 87654321
IC pins: Q8=11, Q7=12, Q6=13, Q5=14, Q4=7, Q3=6, Q2=5, Q1=4.
Circuit Exercise
None
Integration time is set up with I2 and I0 high and all other I lines low. This test uses the same
circuit setup as test 202.1. A zero reading is acquired and stored as baseline value for test 202.28.
Analog Board; 2002-100
A/D Converter; 2002-160
Bit pattern*
—U810—
00000000
—U206—
01110000
—U203—
10001110
—U411—
11111011
Q Q Q Q
87654321 87654321
Register
—U809— AD_STB
00001001
—U207— MUX_STB
00110111
—U221— R1_STB
11101001
—U406— R2_STB
00000100